TUSB2046B, TUSB2046BI

4PORT HUB FOR THE UNIVERSAL SERIAL BUS

WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS413B − FEBRUARY 2000 − REVISED DECEMBER 2004

9

POST OFFICE BOX 655303

APPLICATION INFORMATION

USB design notes

The following sections provide block diagram examples of how to implement the TUSB2046B device. Note,

even though no resistors are shown, pullup, pulldown, and series resistors must be used to properly implement

this device.

Figure 6 is an example of how to generate the 6 MHz clock signal.

XTAL1

XTAL2

NOTE A: Figure 6 assumes a 6-MHz fundamental crystal that is parallel loaded. The component values of C1, C2, and Rd are determined using

a crystal from Fox Electronics − part number HC49U−6.00MHz30\50\0

±70\20 which means ±30 ppm at 25°C and 50 ppm from 0°C

to 70

°C. The characteristics for the crystal include a load capacitance (CL) of 20 pF, maximum shunt capacitance (Co) of 7 pF, and

the maximum ESR of 50

Ω. In order to insure enough negative resistance, use C1 = C2 = 27 pF. The resistor Rd is used to trim the

gain, and Rd = 1.5 kΩ is recommended.

Rd

C2

C1

CL

Figure 6. Crystal Tuning Circuit

input clock configuration

The input clock configuration logic of TUSB2046B is enhanced to accept a 6-MHz crystal or 48-MHz

on-the-board clock source with a simple tie-off change on TSTMODE (terminal 31).

In this mode, both TSTMODE and TSTPLL/48MCLK terminals must be tied to ground. The hub is configured

to use the 6-MHz clock on terminals 30 and 29, which are XTAL1 and XTAL2, respectively, on the

TUSB2046B. This is identical to the TUSB2046.

6-MHz

Clock Signal

30

29

31

27

XTAL1

XTAL2

TSTMODE

TSTPLL/48MCLK

TUSB2046B USB HUB

Figure 7. 6-MHz Input Clock Configuration