TUSB2046B, TUSB2046BI

4PORT HUB FOR THE UNIVERSAL SERIAL BUS

WITH OPTIONAL SERIAL EEPROM INTERFACE

SLLS413B − FEBRUARY 2000 − REVISED DECEMBER 2004

4

POST OFFICE BOX 655303

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

BUSPWR

8

I

Power source indicator. BUSPWR is an active-high input that indicates whether the downstream ports

source their power from the USB cable or a local power supply. For the bus-power mode, this terminal must

be pulled to 3.3 V, and for the self-powered mode, this terminal must be pulled low. Input must not change

dynamically during operation.

DM0

2

I/O

Root port USB differential data minus. DM0 paired with DP0 constitutes the upstream USB port.

DM1 − DM4

11, 15,

19, 23

I/O

USB differential data minus. DM1 − DM4 paired with DP1 − DP4 support up to four downstream USB ports.

DP0

1

I/O

Root port USB differential data plus. DP0 paired with DM0 constitutes the upstream USB port.

DP1 − DP4

12, 16,

20, 24

I/O

USB differential data plus. DP1 − DP4 paired with DM1 − DM4 support up to four downstream USB ports.

EECLK

5

O

EEPROM serial clock. When EXTMEM is high, the EEPROM interface is disabled. The EECLK terminal

is disabled and must be left floating (unconnected). When EXTMEM is low, EECLK acts as a 3-state serial

clock output to the EEPROM with a 100-

µA internal pulldown.

EEDATA/

GANGED

6

I/O

EEPROM serial data/power-management mode indicator. When EXTMEM is high, EEDATA/GANGED

selects between ganged or per-port power overcurrent detection for the downstream ports. When

EXTMEM is low, EEDATA/GANGED acts as a serial data I/O for the EEPROM and is internally pulled down

with a 100-

µA pulldown. This standard TTL input must not change dynamically during operation.

EXTMEM

26

I

EEPROM read enable. When EXTMEM is high, the serial EEPROM interface of the device is disabled.

When EXTMEM is low, terminals 5 and 6 are configured as the clock and data terminals of the serial

EEPROM interface, respectively.

GND

7, 28

Ground. GND terminals must be tied to ground for proper operation.

OVRCUR1 −

OVRCUR4

10, 14,

18, 22

I

Overcurrent input. OVRCUR1 − OVRCUR4 are active low. For per-port overcurrent detection, one

overcurrent input is available for each of the four downstream ports. In the ganged mode, any OVRCUR

input may be used and all OVRCUR terminals must be tied together. OVRCUR terminals are active low

inputs with noise filtering logic.

PWRON1 −

PWRON4

9, 13,

17, 21

O

Power-on/-off control signals. PWRON1 − PWRON4 are active low, push-pull outputs. Push-pull outputs

eliminate the pullup resistors which open-drain outputs require. However, the external power switches that

connect to these terminals must be able to operate with 3.3-V inputs because these outputs cannot drive

5-V signals.

RESET

4

I

Reset. RESET is an active low TTL input with hysteresis and must be asserted at power up. When RESET

is asserted, all logic is initialized. Generally, a reset with a pulse width between 100

µs and 1 ms is

recommended after 3.3-V VCC reaches its 90%. Clock signal has to be active during the last 60 µs of the

reset window.

SUSPND

32

O

Suspend status. SUSPND is an active high output available for external logic power-down operations.

During the suspend mode, SUSPND is high. SUSPND is low for normal operation.

TSTMODE

31

I

Test/mode terminal. TSTMODE is used as a test terminal during production testing. This terminal must

be tied to ground or 3.3-V VCC for normal 6-MHz or 48-MHz operation, respectively.

TSTPLL/

48MCLK

27

I/O

Test/48-MHz clock input. TSTPLL/48MCLK is used as a test terminal during production testing. This

terminal must be tied to ground for normal 6-MHz operation. If 48-MHz input clock is desired, a 48-MHz

clock source (no crystal) can be connected to this input terminal.

VCC

3, 25

3.3-V supply voltage

XTAL1

30

I

Crystal 1. XTAL1 is a 6-MHz crystal input with 50% duty cycle. An internal PLL generates the 48-MHz and

12-MHz clocks used internally by the ASIC logic.

XTAL2

29

O

Crystal 2. XTAL2 is a 6-MHz crystal output. This terminal must be left open when using an oscillator.