May 2007

ASM3P623S05/09A/B

rev 0.3

Timing-Safe™ Peak EMI Reduction IC

2 of 15

Notice: The information in this document is subject to change without notice.

CLKIN

CLK2

1

2

3

4

5

6

7

8

CLK3

CLK4

CLKOUT

GND

ASM3P623S05A/B

CLK1

Spread Spectrum Frequency Generation

The clocks in digital systems are typically square waves

with a 50% duty cycle and as frequencies increase the

edge rates also get faster. Analysis shows that a square

wave is composed of fundamental frequency and

harmonics. The fundamental frequency and harmonics

generate the energy peaks that become the source of

EMI. Regulatory agencies test electronic equipment by

measuring the amount of peak energy radiated from the

equipment. In fact, the peak level allowed decreases as

the frequency increases. The standard methods of

reducing EMI are to use shielding, filtering, multi-layer

PCBs etc. These methods are expensive. Spread

spectrum clocking reduces the peak energy by reducing

the Q factor of the clock. This is done by slowly

modulating

the

clock

frequency.

The

ASM3P623S05/09A/B uses the center modulation spread

spectrum technique in which the modulated output

frequency varies above and below the reference

frequency with a specified modulation rate. With center

modulation, the average frequency is the same as the

unmodulated frequency and there is no performance

degradation

Timing-Safe™ technology

Timing-Safe™ technology is the ability to modulate a

clock source with Spread Spectrum technology and

maintain synchronization with any associated data path.

Pin Configuration ( 8 Pin Devices )

Pin Configuration ( 16 Pin Devices )

1

2

3

4

13

14

15

16

5

6

7

8

9

10

11

12

CLKA3

CLKA4

CLKB3

CLKB4

CLKOUT

GND

S1

S2

CLKA2

CLKB1

CLKB2

CLKA1

CLKIN

ASM3P623S09A/B

GND