TMS77C82 datasheet(13/77 Pages) TI

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TMS370Cx5x

8-BIT MICROCONTROLLER

SPNS010F – DECEMBER 1986 – REVISED FEBRUARY 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

RAM / register file (RF)

Locations within RAM address space can serve as either register file or general-purpose read/write memory,

program memory, or stack instructions. The TMS370Cx50 and TMS370Cx52 devices contain 256 bytes of

internal RAM, mapped beginning at location 0000h and continuing through location 00FFh which is shown in

Table 5 along with other ’x5x devices.

Table 5. RAM Memory Map

‘x50 and ‘x52

‘x56

‘x58

‘x53

‘x59

RAM Size

256 Bytes

512 Bytes

1K Bytes

1.5K Bytes

3.5K Bytes

Memory Mapped

0000h – 00FFh

0000h – 01FFh

0000h – 03FFh

0000h – 05FFh

0000h – 0DFFh

The first 256 bytes of RAM (0000h – 00FFh) are register files, R0 through R255 (see Figure 1). The first two

registers, R0 and R1, are also called register A and B, respectively. Some instructions implicitly use register A

or B; for example, the instruction LDSP (load SP) assumes that the value to be loaded into the stack pointer

is contained in register B. Registers A and B are the only registers cleared on reset.

peripheral file (PF)

The TMS370Cx5x control registers contain all the registers necessary to operate the system and peripheral

modules on the device. The instruction set includes some instructions that access the PF directly. These

instructions designate the register by the number of the PF relative to 1000h, preceded by P0 for a hexadecimal

designator or by P for a decimal designator. For example, the system control register 0 (SCCR0) is located at

address 1010h; its peripheral file hexadecimal designator is P010, and its decimal designator is P16. Table 6

shows the TMS370Cx5x peripheral files.

Table 6. TMS370Cx5x Peripheral File Address map

ADDRESS RANGE

PERIPHERAL FILE

DESIGNATOR

DESCRIPTION

1000h – 100Fh

P000 – P00F

Reserved for factory test

1010h – 101Fh

P010 – P01F

System and EEPROM/EPROM control registers

1020h – 102Fh

P020 – P02F

Digital I/O port control registers

1030h – 103Fh

P030 – P03F

Serial peripheral interface registers

1040h – 104Fh

P040 – P04F

Timer 1 registers

1050h – 105Fh

P050 – P05F

Serial communication interface 1 registers

1060h – 106Fh

P060 – P06F

Timer 2A registers

1070h – 107Fh

P070 – P07F

Analog-to-digital converter 1 registers

1080h – 10BFh

P080 – P0BF

Reserved

10C0h – 10FFh

P0C0 – P0FF

External peripheral control

data EEPROM

The TMS370Cx56 devices contain 512 bytes of data EEPROM, which are memory mapped beginning at

location 1E00h and continuing through location 1FFFh as shown in Table 7 along with other ‘x5x devices.

Table 7. Data-EEPROM Memory Map

‘x50, ‘x52, ‘x58, and ‘x59

‘x56

‘X53

Data-EEPROM Size

256 Bytes

512 Bytes

None

Memory Mapped

1F00h – 1FFFh

1E00h – 1FFFh

None

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