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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMS320VC5402 датащи(PDF) 29 Page - Texas Instruments |
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TMS320VC5402 датащи(HTML) 29 Page - Texas Instruments |
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29 / 68 page  TMS320VC5402 FIXEDPOINT DIGITAL SIGNAL PROCESSOR SPRS079E – OCTOBER 1998 – REVISED AUGUST 2000 29 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 McBSP control registers and subaddresses The control registers for the multichannel buffered serial port (McBSP) are accessed using the subbank addressing scheme. This allows a set or subbank of registers to be accessed through a single memory location. The serial port subbank address (SPSA) register is used as a pointer to select a particular register within the subbank. The serial port subbank data (SPSD) register is used to access (read or write) the selected register. Table 11 shows the McBSP control registers and their corresponding sub-addresses. Table 11. McBSP Control Registers and Subaddresses McBSP0 McBSP1 NAME ADDRESS NAME ADDRESS SUB- ADDRESS DESCRIPTION SPCR10 39h SPCR11 49h 00h Serial port control register 1 SPCR20 39h SPCR21 49h 01h Serial port control register 2 RCR10 39h RCR11 49h 02h Receive control register 1 RCR20 39h RCR21 49h 03h Receive control register 2 XCR10 39h XCR11 49h 04h Transmit control register 1 XCR20 39h XCR21 49h 05h Transmit control register 2 SRGR10 39h SRGR11 49h 06h Sample rate generator register 1 SRGR20 39h SRGR21 49h 07h Sample rate generator register 2 MCR10 39h MCR11 49h 08h Multichannel register 1 MCR20 39h MCR21 49h 09h Multichannel register 2 RCERA0 39h RCERA1 49h 0Ah Receive channel enable register partition A RCERB0 39h RCERB1 49h 0Bh Receive channel enable register partition B XCERA0 39h XCERA1 49h 0Ch Transmit channel enable register partition A XCERB0 39h XCERB1 49h 0Dh Transmit channel enable register partition B PCR0 39h PCR1 49h 0Eh Pin control register DMA subbank addressed registers The direct memory access (DMA) controller has several control registers associated with it. The main control register (DMPREC) is a standard memory-mapped register. However, the other registers are accessed using the subbank addressing scheme. This allows a set or subbank of registers to be accessed through a single memory location. The DMA subbank address (DMSA) register is used as a pointer to select a particular register within the subbank, while the DMA subbank data (DMSDN) register or the DMA subbank data register with autoincrement (DMSDI) is used to access (read or write) the selected register. When the DMSDI register is used to access the subbank, the subbank address is automatically post-incremented so that a subsequent access affects the next register within the subbank. This autoincrement feature is intended for efficient, successive accesses to several control registers. If the autoincrement feature is not required, the DMSDN register should be used to access the subbank. Table 12 shows the DMA controller subbank addressed registers and their corresponding subaddresses. |
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