2

Description

The Harris CD74HC137, CD74HC237 and CD74HCT137,

CD74HCT237 are high speed silicon gate CMOS decoders

well suited to memory address decoding or data routing

applications. Both circuits feature low power consumption

usually associated with CMOS circuitry, yet have speeds

comparable to low power Schottky TTL logic.

Both circuits have three binary select inputs (A0, A1 and A2)

that can be latched by an active High Latch Enable (LE) sig-

nal to isolate the outputs from select-input changes. A “Low”

LE makes the output transparent to the input and the circuit

functions as a one-of-eight decoder. Two Output Enable

and to facilitate demultiplexing. The demultiplexing function

desired output and using one of the other Output Enable

inputs as the data input while holding the other Output

Enable input in its active state. In the CD74HC137 and

CD74HCT137 the selected output is a “Low”; in the

CD74HC237 and CD74HCT237 the selected output is a

“High”.

Ordering Information

PART NUMBER

PACKAGE

PKG.

NO.

CD74HC137E

-55 to 125

16 Ld PDIP

E16.3

CD74HCT137E

-55 to 125

16 Ld PDIP

E16.3

CD74HC237E

-55 to 125

16 Ld PDIP

E16.3

CD74HC237M

-55 to 125

16 Ld SOIC

M16.15

CD74HCT237E

-55 to 125

16 Ld PDIP

E16.3

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to

obtain the variant in the tape and reel.

2. Wafer and die for this part number is available which meets all

electrical specifications. Please contact your local sales office or

Harris customer service for ordering information.

CD74HC137, CD74HCT137, CD74HC237, CD74HCT237