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LTC4218IGN датащи(PDF) 13 Page - Linear Technology |
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LTC4218IGN датащи(HTML) 13 Page - Linear Technology |
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13 / 16 page ![]() LTC4218 13 4218fb APPLICATIONS INFORMATION In this same figure the OV threshold is lowered from 15.05V to 13.5V. Decreasing the OV threshold requires adding a resistor between VDD and OV. This resistor can be calculated as follows: R RV V VV VV SHUNT IN OLD TH NEW OV TH OLD 2 = () () () () • – – NNEW k () ⎛ ⎝ ⎜ ⎜⎜ ⎞ ⎠ ⎟ ⎟⎟ = () 18 15 05 1 235 13 5 1 235 •. . .–. 1 15 05 13 5 1 736 .–. . () ⎛ ⎝⎜ ⎞ ⎠⎟ = M Use the equation for RSHUNT1 for increasing the OV and FB thresholds. Likewise, use the equation for RSHUNT2 for decreasing the UV and FB thresholds. Design Example Consider the following design example (Figure 5): VIN = 12V, IMAX = 7.5A. IINRUSH = 1A, CL = 330μF, VUVON = 9.88V, VOVOFF = 15.05V, VPWRGD = 10.5V. A current limit fault triggers an automatic restart of the power up sequence. The selection of the sense resistor, (RS), is set by the overcurrent threshold of 15mV: RS = 15mV/IMAX = 15mV/7.5A = 0.002Ω The MOSFET should be sized to handle the power dissi- pation during the inrush charging of the output capacitor COUT. The method used to determine the power in Q1 is the principal: EC = Energy in CL = Energy in Q1 Thus: EC = ½ CV2 = ½ (330μF)(12)2 = 0.048J Calculate the time it takes to charge up COUT: t CV I µF V A ms CHARGUP LIN INRUSH == = • • 330 12 1 4 The inrush current is set to 1A using CGATE: CC I I µF µA A µF GATE L GATE UP INRUSH == ≅ () . 330 24 1 001 The average power dissipated in the MOSFET: PDISS = EC/tCHARGUP = 0.048J/4ms = 12W The SOA (safe operating area) curves of candidate MOSFETs must be evaluated to ensure that the heat capacity of the package can stand 12W for 4ms. The SOA curves of the Vishay Siliconix Si7108DN provide 1.5A at 10V (15W) for 100ms, satisfying the requirement. Next,thepowerdissipatedintheMOSFETduringovercurrent must be limited. The active current limit uses a timer to prevent excessive energy dissipation in the MOSFET. The worst-case power occurs when the voltage versus current profile of the foldback current limit is at the maximum. This occurs when the current is 6A and the voltage is one half of 12V or (6V). See the Current Limit Sense Voltage vs FB Voltage in the Typical Performance curves to view this profile. In order to survive 36W, the MOSFET SOA dictates a maximum time at this power level. The Si7108DN allows 60W for 10ms or less. Therefore, it is acceptable to set the current limit timeout using CT to be 1.2ms: CT = 1.2ms/12[ms/μF] = 0.1μF 12V CT 0.1 μF ADC C1 0.1 μF R3 20k 4218 F05 R2 10k CL 330 μF SENSE– GATE SENSE+ VDD UV SOURCE PG GND IMON LTC4218DHC-12 INTVCC TIMER FLT R1 10 Ω RS 2m Ω Q1 Si7108DN 12V + VOUT 12V 6A RGATE 1k CGATE 0.01 μF Figure 5. 6A, 12V Card Resident Application Figure 4. Adjusting LTC4218-12 Thresholds 4218 F04 LTC4218-12 RSHUNT1 RSHUNT2 VDD OV UV |
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