11

LTC3726

3726fb

the phase angle (delay) of the internal oscillator relative to

the incoming sync signal on the FS/SYNC pin. Any one of

six preset values can be selected as summarized in Table 4.

Table 4

FB/PHASE PIN

PHASE DELAY

OPERATING MODE

0

°

Master

180

°

Slave

200k

60

°

Slave

100k

90

°

Slave

50k

120

°

Slave

OPERATIO

APPLICATIO S I FOR ATIO

Start-Up Considerations

In self-starting applications, the LTC3705/LTC3725 will

initially begin the soft-start of the converter in an open-

loop fashion. After bias is obtained on the secondary side,

the LTC3726 assumes control and completes the soft-

start interval. In order to ensure that control is properly

transferred from the LTC3705/LTC3725 (primary-side) to

the LTC3726 (secondary-side), it is necessary to limit the

rate of rise on the primary-side soft-start ramp so that the

LTC3726 has adequate time to wake up and assume

control before the output voltage gets too high. This

condition is satisfied for many applications if the following

relationship is maintained:

However, care should be taken to ensure that soft-start

transfer from primary-side to secondary-side is com-

pleted well before the output voltage reaches its target

value. A good design goal is to have the transfer completed

when the output voltage is less than one-half of its target

value. Note that the fastest output voltage rise time during

primary-side soft-start mode occurs with maximum input

voltage and minimum load current.

The open-loop start-up frequency on the LTC3705/LTC3725

Although the exact start-up frequency on the primary side

is not critical, it is generally good practice to set this

approximately equal to the operating frequency on the

LTC3705/LTC3725 may be selected using the following:

fHz

Rk

PRI

FS IN

()

.•

–

/

=

+

32 10

10

10

In the event that the secondary-side circuitry fails to

properly start up and assume control of switching, there

are several fail-safe mechanisms to help avoid overvoltage

conditions. First, the LTC3705/LTC3725 contains a volt-

second clamp that will keep the primary-side duty cycle at

a level that cannot produce an overvoltage condition.

Second, the LTC3705/LTC3725 contains a time-out fea-

ture that will detect a FAULT if the LTC3726 fails to start up

and deliver PWM signals to the primary side. Finally, the

LTC3726 has an independent overvoltage detection circuit

that will crowbar the output of the DC/DC converter using

the synchronous MOSFET switch.

In the event that a short circuit is applied to the output of

the DC/DC converter prior to start-up, the LTC3726 will

generally not receive enough bias voltage to operate. In

this case, the LTC3705/LTC3725 will detect a FAULT for

Slave Mode Operation

When two or more LTC3726 devices are used in PolyPhase

systems, one device becomes the “Master” controller,

while the others are used as “Slaves.” Slave mode is

activated when the FB/PHASE pin is greater than approxi-

mately 2V. In this mode, the ITH pin becomes a high-

impedance input, allowing it to be driven by the Master

controller. In this way, equal inductor currents are estab-

lished in each of the individual phases. Also, in slave

mode, the soft-start charge/discharge currents are dis-

abled, allowing the Master device to control the charging

and discharging of the soft-start capacitor.

In slave mode, the phase angle of each LTC3726 can be set