LTC2923IDE datasheet(8/20 Pages) LINER

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LTC2923

2923fa

APPLICATIO S I FOR ATIO

Tracking Cell

The LTC2923’s operation is based on the tracking cell

shown in Figure 5, which uses a proprietary wide-range

current mirror. The tracking cell shown in Figure 5 servos

the TRACK pin at 0.8V. The current supplied by the TRACK

pin is mirrored at the FB pin to establish a voltage at the

output of the slave supply. The slave output voltage varies

with the master signal, enabling the slave supply to be

controlled as a function of the master signal with terms set

by RTA and RTB. By selecting appropriate values of RTA and

RTB, it is possible to generate any of the profiles in

Figures 1 to 4.

Controlling the Ramp-Up and Ramp-Down Behavior

The operation of the LTC2923 is most easily understood

by referring to the simplified functional diagram in Fig-

ure 6. When the ON pin is low, the GATE pin is pulled to

ground causing the master signal to remain low. Since the

currents through RTB1 and RTB2 are at their maximum

when the master signal is low, the currents from FB1 and

FB2 are also at their maximum. These currents drive the

slaves’ outputs to their minimum voltages.

When the ON pin rises above 1.23V, the master signal

rises and the slave supplies track the master signal. The

ramp rate is set by an external capacitor driven by a 10µA

current source from an internal charge pump. If no exter-

nal FET is used, the ramp rate is set by tying the RAMP and

GATE pins together at one terminal of the external capaci-

tor (see the Ratiometric Tracking Example).

In a properly designed system, when the master signal has

reached its maximum voltage the current from the TRACKx

pin is zero. In this case, there is no current from the FBx pin

and the LTC2923 has no effect on the output voltage

accuracy, transient response or stability of the slave

supply.

When the ON pin falls below VON(TH) – ∆VON(HYST), typi-

cally 1.225V, the GATE pin pulls down with 10µA and the

master signal and the slave supplies will fall at the same

rate as they rose previously.

The ON pin can be controlled by a digital I/O pin or it can

be used to monitor an input supply. By connecting a

resistive divider from an input supply to the ON pin, the

supplies will ramp up only after the monitored supply has

reached a preset voltage.

Optional External FET

The Coincident Tracking Example (Figures 8 and 9) illus-

trates how an optional external N-channel FET can ramp

up a single supply that becomes the master signal. When

used, the FET’s gate is charged by the GATE pin and its

source is tied to the RAMP pin. Under normal operation,

the GATE pin sources or sinks 10µA to ramp the FET’s gate

up or down at a rate set by the external capacitor con-

nected to the GATE pin. It is a good practice to add 10Ω

between the FET’s gate and the external capacitor to

prevent high frequency oscillations.

–

RTA

RTB

TRACK

MASTER

0.8V

VCC

RFA

2923 F05

SLAVE

RFB

DC/DC

–

FB OUT

Figure 5. Simplified Tracking Cell

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