LTC4307

3

4307f

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Propagation Delay and Rise-Time Accelerators

SDA/SCL Propagation Delay High to Low

70

ns

SDA/SCL Propagation Delay Low to High

10

ns

SDA/SCL Transition Time Low to High

= 3.3V (See Notes 3, 4) (Figure 1)

30

300

ns

SDA/SCL Transition Time High to Low

= 3.3V (See Notes 3, 4) (Figure 1)

30

300

ns

Transient Boosted Pull-Up Current

(Note 5)

58

mA

Input-Output Connection

Input-Output Offset Voltage

Driven SDA/SCL = 0.2V

●

20

60

100

mV

SDA, SCL Logic Input Threshold Voltage

Rising Edge

V

SDA, SCL Logic Input Threshold Voltage

Hysteresis

(Note 3)

50

mV

Digital Input Capacitance SDAIN, SDAOUT,

SCLIN, SCLOUT

(Note 3)

10

pF

Input Leakage Current

SDA, SCL, Pins

●

±5

μA

Output Low Voltage

●

0

0.4

V

Driven SDA/SCL = 0.1V

●

120

160

205

mV

Buffer Input Logic Low Voltage

●

1.2

V

Bus Stuck Low Timeout

Bus Stuck Low Timer

●

25

30

35

ms

Timing Characteristics

(Note 3)

400

600

kHz

Bus Free Time Between Stop and Start

Condition

(Note 3)

1.3

μs

Hold Time After (Repeated) Start Condition (Note 3)

100

ns

Repeated Start Condition Set-Up Time

(Note 3)

0

ns

Stop Condition Set-Up Time

(Note 3)

0

ns

Data Hold Time Input

(Note 3)

0

ns

Data Set-Up Time

(Note 3)

100

ns

The

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: See “Propagation Delays” in the Operations section for a

capacitance.

Note 3: Determined by design, not tested in production.

Typical Performance Characteristics section.

Note 7: All currents into pins are positive; all voltages are referenced to

GND unless otherwise specified.