LTC4307

7

4307f

BLOCK DIAGRA

100k

PRECHARGE

PC_CONNECT

100k

1.4V

UVLO

100k

CONNECT

CONNECT

100k

8mA

SDAIN

6

SLEW RATE

DETECTOR

8mA

CONNECT

CONNECT

SLEW RATE

DETECTOR

8mA

SLEW RATE

DETECTOR

8mA

SLEW RATE

DETECTOR

CONNECT

SDAOUT

7

SCLIN

3

CONNECT

SCLOUT

2

READY

5

PC_CONNECT

30ms

TIMER

LOGIC

ENABLE

PC_CONNECT

1

GND

4307 BD

4

95

μs

DELAY

+

+

–

–

+

–

+

–

+

–

Low Offset 2-Wire Bus Buffer with Stuck Low Timeout

OPERATION

Start-Up

either during power-up or live insertion, it starts in an

undervoltage lockout (UVLO) state, ignoring any activity

This is to ensure that the LTC4307 does not try to function

until it has enough voltage to do so.

During this time, the 1V precharge circuitry is active and

forces 1V through 100k nominal resistors to the SDA

and SCL pins. Because the I/O card is being plugged

into a live backplane, the voltage on the backplane SDA

Precharging the SCL and SDA pins to 1V minimizes the

worst-case voltage differential these pins will see at the