6

LTC1040

1040fa

Tracking Error

Minimizing Comparison Errors

The two differential input voltages, V1 and V2, are con-

Figure 2). The charge is summed at the virtual ground

point; if the net charge is positive, the comparator output

is high and if negative, it is low. There is an optimum way

to connect these inputs, in a specific application, to

minimize error.

APPLICATIO S I FOR ATIO

Ignoring internal offset, the LTC1040 will be at its switch-

ing point when:

Optimum error will be achieved when the differential

voltages, V1 and V2, are individually minimized. Figure 3

shows two ways to connect the LTC1040 to compare an

above equation, each method will be at null when:

(a)

Notice that in method (a) the null point depends on the

ratio. Also, because method (b) has zero differential input

voltage, the errors due to finite input resistance are

negligible. The LTC1040 has a high accuracy capacitor

array and even the non-optimum connection will only

result in

± 0.1% more error, worst-case compared to the

optimum connection.

LTC1040 • AI02

VIRTUAL

GROUND

LTC1040 DUAL DIFFERENTIAL INPUT

S1

S2

+

–

+

–

V1

V2

Figure 2. Dual Differential Equivalent Input Circuit

Common Mode Range

The input switches of the LTC1040 are capable of

input common mode range includes both supply rails.

Many applications, not feasible with conventional com-

parators, are possible with the LTC1040. In the load

current detector shown in Figure 4, a 0.1

Ω resistor is used

requires the dual differential input and common mode

capabilities of the LTC1040.

Figure 4. Load Current Detector

= 1V

± 1mV

Figure 3. Two Ways to Do It

LTC1040 • TA03

–

–

+

+

–

–

+

+

(a) OK

(b) Optimum

LTC1040 • AI04

100mV

–

–

+

+

+

0.1

Ω

OUT

1/2

LTC1040