TCM680 datasheet(3/7 Pages) TELCOM

3 / 7 page

4-15

TELCOM SEMICONDUCTOR, INC.

TCM680

+5V TO

±10V VOLTAGE CONVERTER

Figure 4. Charge Pump – Phase 3

Phase 2

VSS transfer – Phase two of the clock connects the

negative terminal of C2 to the VSS storage capacitor C3 and

the positive terminal of C2 to ground, transferring the gener-

ated –10V to C3. Simultaneously, the positive side of capaci-

tor C1 is switched to +5V and the negative side is connected

to ground.

Phase 3

VDD charge storage – The third phase of the clock is

identical to the first phase – the charge transferred in C1

produces –5V in the negative terminal of C1, which is applied

to the negative side of capacitor C2. Since C2

+ is at +5V, the

voltage potential across C2 is 10V.

Figure 3. Charge Pump – Phase 2

DETAILED DESCRIPTION

Phase 1

VSS charge storage – The positive side of capacitors C1

and C2 are connected to +5V at the start of this phase. C1

+ is

then switched to ground and the charge in C1

– is transferred

to C2

–. Since C

+ is connected to +5V, the voltage potential

across capacitor C2 is now 10V.

Phase 4

VDD transfer – The fourth phase of the clock connects

the negative terminal of C2 to ground, and transfers the

generated 10V across C2 to C4, the VDD storage capacitor.

Again, simultaneously with this, the positive side of capaci-

tor C1 is switched to +5V and the negative side is connected

to ground, and the cycle begins again.

Figure 2. Charge Pump – Phase 1

IN = +5V

–5V

SW4

SW1

SW2

SW3

–

+5V

–10V

SW4

SW2

SW1

SW3

–

IN = +5V

–5V

SW4

SW1

SW2

SW3

–

Figure 5. Charge Pump – Phase 4

+5V

–10V

SW4

SW2

SW1

SW3

–

MAXIMUM OPERATING LIMITS

The TCM680 has on-chip zener diodes that clamp VIN

to 5.8V, V

OUT to 11.6V, and V

–

OUT to –11.6V. Never exceed

the maximum supply voltage or excessive current will be

shunted by these diodes, potentially damaging the chip. The

TCM680 will operate over the entire operating temperature

range with an input voltage of 2V to 5.5V.

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