AT91SAM9261 datasheet(36/43 Pages) ATMEL

36 / 43 page

6062KS–ATARM–15-Jan-09

AT91SAM9261 Preliminary

10.7

Serial Peripheral Interface

• Supports communication with serial external devices

– Four chip selects with external decoder support allow communication with up to

fifteen peripherals

– Serial memories, such as DataFlash and 3-wire EEPROMs

– Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and

Sensors

– External co-processors

• Master or slave serial peripheral bus interface

– 8- to 16-bit programmable data length per chip select

– Programmable phase and polarity per chip select

– Programmable transfer delays between consecutive transfers and between clock

and data per chip select

– Programmable delay between consecutive transfers

– Selectable mode fault detection

• Very fast transfers supported

– Transfers with baud rates up to MCK

– The chip select line may be left active to speed up transfers on the same device

10.8

Two-wire Interface

• Compatibility with standard two-wire serial memory

• One, two or three bytes for slave address

• Sequential read/write operations

10.9

USART

• Programmable Baud Rate Generator

• 5- to 9-bit full-duplex synchronous or asynchronous serial communications

– 1, 1.5 or 2 stop bits in Asynchronous Mode or 1 or 2 stop bits in Synchronous Mode

– Parity generation and error detection

– Framing error detection, overrun error detection

– MSB- or LSB-first

– Optional break generation and detection

– By-8 or by-16 over-sampling receiver frequency

– Hardware handshaking RTS-CTS

– Receiver time-out and transmitter timeguard

– Optional Multi-drop Mode with address generation and detection

• RS485 with driver control signal

• ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards

– NACK handling, error counter with repetition and iteration limit

• IrDA modulation and demodulation

– Communication at up to 115.2 Kbps

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