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ST72371 датащи(PDF) 51 Page - STMicroelectronics

номер детали ST72371
подробное описание детали  8-BIT MCUs WITH 16K ROM/OTP/EPROM,512 BYTES RAM, ADC, DAC (PWM), TIMER, I2C AND SCI
PDF  94 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72371 датащи(HTML) 51 Page - STMicroelectronics

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ST72371/ST72372
I C BUS INTERFACE (Cont’d)
Figure 3. Transfer Sequencing
Legend:
S=Start, P=Stop, A=Acknowledge, NA=Non-acknowledge
EVx=Event (with interrupt if ITE=1)
EV1: EVF=1, ADSL=1, cleared by reading SR1 register.
EV2: EVF=1, BTF=1, cleared by reading SR1 register followed by reading DR register.
EV3: EVF=1, BTF=1, cleared by reading SR1 register followed by writing DR register.
EV3-1: EVF=1, AF=1, cleared by reading SR1 register.
EV4: EVF=1, STOPF=1, cleared by reading SR2 register.
EV5: EVF=1, SB=1, cleared by reading SR1 register followed by writing DR register.
EV6: EVF=1, cleared by reading SR1 register followed by writing CR register (for example PE=1).
EV7: EVF=1, BTF=1, cleared by reading SR1 register followed by reading DR register.
EV8: EVF=1, BTF=1, cleared by reading SR1 register followed by writing DR register.
Figure 4. Event Flags and Interrupt Generation
Slave receiver:
Slave transmitter:
Master receiver:
Master transmitter:
S Address
A
Data1
A
Data2
A
.....
DataN
A
P
EV1
EV2
EV2
EV2
EV4
S Address
A
Data1
A
Data2
A
.... .
DataN
NA
P
EV1 EV3
EV3
EV3
EV3-1
EV4
S
Address
A
Data1
A
Data2
A
.... .
DataN
NA
P
EV5
EV6
EV7
EV7
EV7
S
Address
A
Data1
A
Data2
A
.....
DataN
A
P
EV5
EV6 EV8
EV8
EV8
EV8
BTF
ADSL
SB
AF
STOPF
ARLO
BERR
EVF
INTERRUPT
ITE
*
* EVF can also be set by EV6 or an error from the SR2 register.



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