TSS463B datasheet(18/59 Pages) ATMEL

18 / 59 page

TSS463B

4102E–AUTO–12/04

The division is done with the rest initialized to 0x7FFF, and an inversion of the CRC bits

is performed before transmission.

However, since the CRC is calculated automatically from the identifier, command and

data fields by the TSS463B, it need not concern the user of the circuit. When the frame

check sequence has been transmitted, the transmitting module must transmit an End Of

Data (EOD) sequence, followed by the ACKnowledge field (ACK) and the End of Frame

sequence (EOF) to terminate the transfer.

Figure 16. Acknowledge Sequences

Frame Examples

The frames transmitted on the VAN bus are generated by several modules, each sup-

plying different parts of the message. Figure 17 through Figure 20 show the four frame

types specified in the VAN standard, and the module that is generated by the different

fields.

•

The most straightforward frame is the normal data frame in Figure 17 Like all other

frames it is initiated with a SOF sequence. This sequence is generated by a bus

master (not shown in the figure).

During this frame there is basically only one module transmitting with the only

exception being the acknowledgement, generated by the receiving module if

requested in the RAK bit.

•

The reply request frame with immediate reply in Figure 18 is the only frame in that a

slave module can transmit data by filling it into the appropriate field.

The only difference for the frame on the bus is that the R/W bit has changed state

compared to the normal frame.

This is a highly interactive frame where a bus master generates the SOF and the

initiator generates the identifier, the three first bits of the command, and the

acknowledge. The RTR bit, the data field, the frame check, the EOD and the EOF

are all generated by the replying module.

•

The reply request frame with deferred reply in Figure 19 is basically the same frame

as the reply request frame with immediate reply, but since the requested module

does not generate the RTR bit the requesting module will continue with the frame

check, the EOD and the EOF.

During this frame the requested module will only generate the acknowledge, and

only if this was requested by the initiator through the RAK bit.

•

Finally the deferred reply frame in Figure 20 that is sent when a module has

prepared a reply for a reply request that has been received before.

This frame very closely mimics the normal data frame with the only exception being

the R/W bit that has changed state.

VAN BUS

SEQUENCE

VAN BUS

SEQUENCE

NUMBER OF

PRESCALED

CLOCKS

POSITIVE ACKNOWLEDGE

ABSENT ACKNOWLEDGE

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