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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HEF4044B датащи(PDF) 5 Page - NXP Semiconductors |
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HEF4044B датащи(HTML) 5 Page - NXP Semiconductors |
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5 / 13 page  HEF4044B_6 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 06 — 11 November 2008 5 of 13 NXP Semiconductors HEF4044B Quad R/S latch with 3-state outputs 11. Dynamic characteristics [1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). IDD supply current IO = 0 A 5 V - 20 - 20 - 150 µA 10 V - 40 - 40 - 300 µA 15 V - 80 - 80 - 600 µA CI input capacitance - - - 7.5 - - pF Table 6. Static characteristics …continued VSS = 0 V; VI = VSS or VDD unless otherwise specified. Symbol Parameter Conditions VDD Tamb = −40 °C Tamb = 25 °C Tamb = 85 °C Unit Min Max Min Max Min Max Table 7. Dynamic characteristics VSS = 0 V; Tamb = 25 °C; for test circuit see Figure 6; unless otherwise specified. Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit tPHL HIGH to LOW propagation delay nR to nQ; see Figure 4 5 V [1] 63 ns + (0.55 ns/pF)CL - 90 185 ns 10 V 29 ns + (0.23 ns/pF)CL -40 80 ns 15 V 22 ns + (0.16 ns/pF)CL -30 60 ns tPLH LOW to HIGH propagation delay nS to nQ; see Figure 4 5 V [1] 63 ns + (0.55 ns/pF)CL - 90 180 ns 10 V 29 ns + (0.23 ns/pF)CL -40 80 ns 15 V 22 ns + (0.16 ns/pF)CL -30 60 ns tt transition time see Figure 4 5 V [1] 10 ns + (1.00 ns/pF)CL - 60 120 ns 10 V 9 ns + (0.42 ns/pF)CL -30 60 ns 15 V 6 ns + (0.28 ns/pF)CL -20 40 ns tPHZ HIGH to OFF-state propagation delay OE → nQ; see Figure 5 5 V - 50 100 ns 10 V - 30 60 ns 15 V - 25 50 ns tPLZ LOW to OFF-state propagation delay OE → nQ; see Figure 5 5 V - 30 60 ns 10 V - 25 45 ns 15 V - 20 40 ns tPZH OFF-state to HIGH propagation delay OE → nQ; see Figure 5 5 V - 50 100 ns 10 V - 25 50 ns 15 V - 20 40 ns tPZL OFF-state to LOW propagation delay OE → nQ; see Figure 5 5 V - 50 95 ns 10 V - 25 45 ns 15 V - 20 35 ns tW pulse width nS input LOW; minimum width; see Figure 4 5 V 30 15 - ns 10 V 20 10 - ns 15 V 16 8 - ns nR input LOW; minimum width; see Figure 4 5 V 30 15 - ns 10 V 20 10 - ns 15 V 16 8 - ns |
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