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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC8641D датащи(PDF) 75 Page - Freescale Semiconductor, Inc |
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MPC8641D датащи(HTML) 75 Page - Freescale Semiconductor, Inc |
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75 / 140 page  MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 1 Freescale Semiconductor 75 PCI Express Figure 50. Minimum Transmitter Timing and Voltage Output Compliance Specifications 14.4.3 Differential Receiver (RX) Input Specifications Table 50 defines the specifications for the differential input at all receivers (RXs). The parameters are specified at the component pins. Table 50. Differential Receiver (RX) Input Specifications Symbol Parameter Min Nom Max Units Comments UI Unit Interval 399.8 8 400 400.12 ps Each UI is 400 ps ± 300 ppm. UI does not account for Spread Spectrum Clock dictated variations. See Note 1. VRX-DIFFp-p Differential Peak-to-Peak Output Voltage 0.175 1.200 V VRX-DIFFp-p = 2*|VRX-D+ - VRX-D-| See Note 2. TRX-EYE Minimum Receiver Eye Width 0.4 UI The maximum interconnect media and Transmitter jitter that can be tolerated by the Receiver can be derived as TRX-MAX-JITTER = 1 - TRX-EYE= 0.6 UI. See Notes 2 and 3. |
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