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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD9520-4/PCBZ датащи(PDF) 11 Page - Analog Devices |
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AD9520-4/PCBZ датащи(HTML) 11 Page - Analog Devices |
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11 / 84 page  AD9520-4 Rev. 0 | Page 11 of 84 CLOCK OUTPUT ABSOLUTE PHASE NOISE (INTERNAL VCO USED) Table 7. Parameter Min Typ Max Unit Test Conditions/Comments LVPECL ABSOLUTE PHASE NOISE Internal VCO; direct-to-LVPECL output and for loop bandwidths < 1 kHz VCO = 1.8 GHz; OUTPUT = 1.8 GHz @ 1 kHz Offset −54 dBc/Hz @ 10 kHz Offset −84 dBc/Hz @ 100 kHz Offset −108 dBc/Hz @ 1 MHz Offset −128 dBc/Hz @ 10 MHz Offset −143 dBc/Hz @ 40 MHz Offset −148 dBc/Hz VCO = 1.625 GHz; OUTPUT = 1.625 GHz @ 1 kHz Offset −58 dBc/Hz @ 10 kHz Offset −87 dBc/Hz @ 100 kHz Offset −111 dBc/Hz @ 1 MHz Offset −130 dBc/Hz @ 10 MHz Offset −144 dBc/Hz @ 40 MHz Offset −148 dBc/Hz VCO = 1.45 GHz; OUTPUT = 1.45 GHz @ 1 kHz Offset −62 dBc/Hz @ 10 kHz Offset −91 dBc/Hz @ 100 kHz Offset −115 dBc/Hz @ 1 MHz Offset −133 dBc/Hz @ 10 MHz Offset −143 dBc/Hz @ 40 MHz Offset −148 dBc/Hz CLOCK OUTPUT ABSOLUTE TIME JITTER (CLOCK GENERATION USING INTERNAL VCO) Table 8. Parameter Min Typ Max Unit Test Conditions/Comments LVPECL OUTPUT ABSOLUTE TIME JITTER Application example based on a typical setup where the reference source is clean, so a wider PLL loop bandwidth is used; reference = 15.36 MHz; R = 1 VCO = 1.475 GHz; LVPECL = 245.76 MHz; PLL LBW = 39 kHz 109 fS rms Integration BW = 200 kHz to 10 MHz 269 fS rms Integration BW = 12 kHz to 20 MHz VCO = 1.475 GHz; LVPECL = 122.88 MHz; PLL LBW = 39 kHz 114 fS rms Integration BW = 200 kHz to 10 MHz 263 fS rms Integration BW = 12 kHz to 20 MHz VCO = 1.475 GHz; LVPECL = 61.44 MHz; PLL LBW = 39 kHz 146 fS rms Integration BW = 200 kHz to 10 MHz 291 fS rms Integration BW = 12 kHz to 20 MHz CLOCK OUTPUT ABSOLUTE TIME JITTER (CLOCK CLEANUP USING INTERNAL VCO) Table 9. Parameter Min Typ Max Unit Test Conditions/Comments LVPECL OUTPUT ABSOLUTE TIME JITTER Application example based on a typical setup where the reference source is jittery, so a narrower PLL loop bandwidth is used; reference = 10.0 MHz; R = 20 VCO = 1.555 GHz; LVPECL = 155.52 MHz; PLL LBW = 1.8 kHz 440 fS rms Integration BW = 12 kHz to 20 MHz VCO = 1.474 GHz; LVPECL = 122.88 MHz; PLL LBW = 1.9 kHz 360 fS rms Integration BW = 12 kHz to 20 MHz |
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