AD7352

Rev. 0 | Page 19 of 20

APPLICATION HINTS

GROUNDING AND LAYOUT

The analog and digital supplies to the AD7352 are independent

and separately pinned out to minimize coupling between the

analog and digital sections of the device. The printed circuit

board (PCB) that houses the AD7352 should be designed so

that the analog and digital sections are separated and confined

to certain areas of the board. This design facilitates the use of

ground planes that can be easily separated.

To provide optimum shielding for ground planes, a minimum

etch technique is generally best. The two AGND pins of the

AD7352 should be sunk in the AGND plane. The REFGND

pin should also be sunk in the AGND plane. Digital and analog

ground planes should be joined in only one place. If the

AD7352 is in a system in which multiple devices require an

AGND and DGND connection, the connection should still

be made at one point only, a star ground point should be

established as close as possible to the ground pins on the

AD7352.

Avoid running digital lines under the device because this couples

noise onto the die. Allow the analog ground planes to run under

the AD7352 to avoid noise coupling. The power supply lines to

the AD7352 should use as large a trace as possible to provide

low impedance paths and reduce the effects of glitches on the

power supply line.

To avoid radiating noise to other sections of the board, shield

fast switching signals such as clocks, with digital ground, and

never run clock signals near the analog inputs. Avoid crossover

of digital and analog signals. To reduce the effects of

feedthrough within the board, traces on opposite sides of the

board should run at right angles to each other. A microstrip

technique is the best method but is not always possible with a

double-sided board. In this technique, the component side of

the board is dedicated to ground planes and signals are placed

on the solder side.

Good decoupling is important; decouple all supplies with 10 μF

tantalum capacitors in parallel with 0.1 μF capacitors to GND.

To achieve the best results from these decoupling components,

they must be placed as close as possible to the device, ideally

right up against the device. The 0.1 μF capacitor, (including the

common ceramic types or surface-mount types) should have

low effective series resistance (ESR) and effective series

inductance (ESI). These low ESR and ESI capacitors provide a

low impedance path to ground at high frequencies to handle

transient currents due to logic switching.

EVALUATING THE AD7352 PERFORMANCE

The recommended layout for the AD7352 is outlined in the

evaluation board documentation. The evaluation board package

includes a fully assembled and tested evaluation board, documen-

tation, and software for controlling the board from the PC via

the converter evaluation and development board (CED). The

CED can be used in conjunction with the AD7352 evaluation

board (as well as many other Analog Devices, Inc., evaluation

boards ending in the ED designator) to demonstrate/evaluate

the ac and dc performance of the AD7352.

The software allows the user to perform ac (fast Fourier transform)

and dc (linearity) tests on the AD7352. The software and docu-

mentation are on a CD shipped with the evaluation board.