TDA9115 datasheet(29/45 Pages) STMICROELECTRONICS

29 / 45 page

TDA9115

29/45

charge exponential is replaced by VVOB level,

which, under control of the CONTROLLER, cre-

ates a rapid falling edge and a flat part before be-

ginning of new ramp. Mean value of the waveform

output on pin VOut is adjusted by means of

VPOS

I2C bus control, its amplitude through

VSIZE I2C

bus control. Vertical moiré is superimposed.

The biasing voltage for external DC-coupled verti-

cal power amplifier is to be derived from VRefO

voltage provided on pin RefOut, using a resistor di-

vider, this to ensure the same temperature drift of

mean (DC) levels on both differential inputs and to

compensate for spread of VRefO value (and so

mean output value) between particular devices.

9.4.2 Vertical moiré

To blur the interaction of deflection lines with CRT

mask grid pitch that can generate moiré pattern,

the picture position is to be alternated at frame fre-

quency. For this purpose, a square waveform at

half-frame frequency is superimposed on the out-

put waveform’s DC value. Its amplitude is adjusta-

ble through

VMOIRE I2C bus control,.

Figure 11. Vertical section block diagram

9.5 EW DRIVE SECTION

The goal of the EW drive section is to provide, on

pin EWOut, a waveform which, used by an exter-

nal DC-coupled power stage, serves to compen-

sate for those geometry errors of the picture that

are symmetric versus vertical axis across the mid-

dle of the picture.

The waveform consists of an adjustable DC value,

corresponding to horizontal size, a parabola of 2nd

order for “pin cushion” correction and a linear for

“keystone” correction. All of them are adjustable

via I2C bus, see I2C BUS CONTROL REGISTER

MAP on page 20.

Refer to Figure 12, Figure 13 and to chapter TYP-

ICAL OUTPUT WAVEFORMS. The correction

waveforms have no effect in the vertical middle of

the screen (if the

VPOS control is adjusted to its

medium value). As they are summed, the resulting

waveform tends to reach its maximum span at top

and bottom of the picture. The voltage at the

EWOut is top and bottom limited (see parameter

VEW). According to Figure 13, especially the bot-

tom limitation seems to be critical for maximum

horizontal size (minimum DC). Actually it is not

critical since the parabola component must always

be applied. As all the components of the resulting

correction waveform are generated from the out-

Synchro

Polarity

Controller

Discharge

Sampling

Capacitance

S-correction

CCOR

C-correction

VVOB

sawtooth

REF

Charge current

Transconductance amplifier

2C)

SCOR (I2C)

20 VAGCCap

discharge

CCOR

VSIZE (I2C)

VMOIRE (I

2C)

VPOS (I

2C)

VOscF

VOut

VEHTIn

VCap

VSyn

OSC

Cap.

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