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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMS320DM335 датащи(PDF) 7 Page - Texas Instruments |
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TMS320DM335 датащи(HTML) 7 Page - Texas Instruments |
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7 / 158 page  2.2 Memory Map Summary TMS320DM335 Digital Media System-on-Chip (DMSoC) www.ti.com SPRS528A – JULY 2008 – REVISED AUGUST 2008 Table 2-3 shows the memory map address ranges of the device. Table 2-3 depicts the expanded map of the Configuration Space (0x01C0 0000 through 0x01FF FFFF). The device has multiple on-chip memories associated with its processor and various subsystems. To help simplify software development a unified memory map is used where possible to maintain a consistent view of device resources across all bus masters. The bus masters are the ARM, EDMA, USB, and VPSS. Table 2-2. DM335 Memory Map Start Address End Address Size (Bytes) ARM EDMA USB VPSS Mem Map Mem Map Mem Map Mem Map 0x0000 0000 0x0000 3FFF 16K ARM RAM0 (Instruction) 0x0000 4000 0x0000 7FFF 16K ARM RAM1 Reserved Reserved (Instruction) 0x0000 8000 0x0000 FFFF 32K ARM ROM (Instruction) - only 8K used 0x0001 0000 0x0001 3FFF 16K ARM RAM0 (Data) ARM RAM0 ARM RAM0 0x0001 4000 0x0001 7FFF 16K ARM RAM1 (Data) ARM RAM1 ARM RAM1 0x0001 8000 0x0001 FFFF 32K ARM ROM (Data) ARM ROM ARM ROM - only 8K used 0x0002 0000 0x000F FFFF 896K Reserved 0x0010 0000 0x01BB FFFF 26M 0x01BC 0000 0x01BC 0FFF 4K ARM ETB Mem 0x01BC 1000 0x01BC 17FF 2K ARM ETB Reg Reserved 0x01BC 1800 0x01BC 18FF 256 ARM IceCrusher Reserved 0x01BC 1900 0x01BC FFFF 59136 Reserved 0x01BD 0000 0x01BF FFFF 192K 0x01C0 0000 0x01FF FFFF 4M CFG Bus CFG Bus Reserved Peripherals Peripherals 0x0200 0000 0x09FF FFFF 128M ASYNC EMIF (Data) ASYNC EMIF (Data) 0x0A00 0000 0x11EF FFFF 127M - 16K 0x11F0 0000 0x11F1 FFFF 128K Reserved Reserved 0x11F2 0000 0x1FFF FFFF 141M-64K 0x2000 0000 0x2000 7FFF 32K DDR EMIF Control DDR EMIF Control Regs Regs 0x2000 8000 0x41FF FFFF 544M-32K Reserved 0x4200 0000 0x49FF FFFF 128M Reserved Reserved 0x4A00 0000 0x7FFF FFFF 864M Reserved 0x8000 0000 0x8FFF FFFF 256M DDR EMIF DDR EMIF DDR EMIF DDR EMIF 0x9000 0000 0xFFFF FFFF 1792M Reserved Reserved Reserved Reserved Table 2-3. DM335 ARM Configuration Bus Access to Peripherals Address Accessibility Region Start End Size ARM EDMA EDMA CC 0x01C0 0000 0x01C0 FFFF 64K √ √ EDMA TC0 0x01C1 0000 0x01C1 03FF 1K √ √ EDMA TC1 0x01C1 0400 0x01C1 07FF 1K √ √ Reserved 0x01C1 0800 0x01C1 9FFF 38K √ √ Reserved 0x01C1 A000 0x01C1 FFFF 24K √ √ UART0 0x01C2 0000 0x01C2 03FF 1K √ √ Submit Documentation Feedback Device Overview 7 |
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