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TAS5701PAPR датащи(PDF) 8 Page - Texas Instruments |
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TAS5701PAPR датащи(HTML) 8 Page - Texas Instruments |
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8 / 26 page ![]() DISSIPATION RATINGS RECOMMENDED OPERATING CONDITIONS PWM OPERATION AT RECOMMENDED OPERATING CONDITIONS PLL INPUT PARAMETERS AND EXTERNAL FILTER COMPONENTS TAS5701 SLOS559 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com TA ≤ 25°C DERATING FACTOR TA = 45°C TA = 70°C PACKAGE (1) POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING 10 × 10 QFP 5 W 40 mW/°C(2) 3.2 W 2.6 W (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com (2) This data was taken using 1 oz trace and copper pad that is soldered directly to a JEDEC standard high-k PCB. The thermal pad must be soldered to a thermal land on the printed-circuit board. See TI Technical Briefs SLMA002 for more information about using the HTQFP thermal pad. over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT Gate drive supply voltage GVDD, VDD 10.8 12 13.2 V Output bridge supply voltage PVDD 0 21 V Digita supply voltage DVDD 3 3.3 3.6 V Analog supply voltage AVDD 3 3.3 3.6 V VIH High-level input voltage 3.3-V TTL, 5-V tolerant 2 V VIL Low-level input voltage 3.3-V TTL, 5-V tolerant 0.8 V TA Operating ambient temperature range 0 85 °C TJ Operating junction temperature range 0 150 °C RL (BTL) 6.0 8 RL (SE) Load impedance Output filter: L = 22 µH, C = 680 nF. 3.2 4 Ω RL (PBTL) 3.2 4 LO (BTL) 10 Minimum output inductance under LO (SE) Output-filter inductance 10 µH short-circuit condition LO (PBTL) 10 PARAMETER TEST CONDITIONS MODE VALUE UNIT 32–kHz data rate ±2% 12× sample rate 384 kHz Output sample rate 2×–1× 44.1-, 88.2-, 176.4-kHz data rate ±2% 8×, 4×, and 2× sample rates 352.8 kHz oversampled 48-, 96-, 192-kHz data rate ±2% 8×, 4×, and 2× sample rates 384 kHz PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fMCLKI Frequency, MCLK (1 / tcyc2) 4.9 49.2 MHz MCLK duty cycle 40% 50% 60% ≥2-V MCLK = 49.152 MHz, within the MCLK minimum high time 8 ns min and max duty cycle constraints ≤0.8-V MCLK = 49.152 MHz, within the MCLK minimum low time 8 ns min and max duty cycle constraints LRCLK allowable drift before LRCLK reset 4 MCLKs External PLL filter capacitor C1 SMD 0603 Y5V 47 nF External PLL filter capacitor C2 SMD 0603 Y5V 4.7 nF External PLL filter resistor R SMD 0603, metal film 470 Ω 8 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TAS5701 |
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