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TAS3218PZP датащи(PDF) 72 Page - Texas Instruments

номер детали TAS3218PZP
подробное описание детали  DIGITAL AUDIO PROCESSOR WITH ANALOG INTERFACE
PDF  79 Pages
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TAS3218PZP датащи(HTML) 72 Page - Texas Instruments

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DC Dither (0x1d)
DSP Program Start Address (0x1e)
TAS3218
SLES235 – JULY 2008 ....................................................................................................................................................................................................... www.ti.com
Table 46. Channel Source Number
CHANNEL SOURCE NUMBER
b19
b18
b17
b16
Channel 2
0
0
1
0
Table 47. Category Code
CATEGORY CODE
b8
b9
b10
b11
b12
b13
b14
Digital sound processor
0
1
0
1
0
1
0
Table 48. Generation Status
GENERATION STATUS
Vx
Gen 1 or higher
0
Original
1
Table 49. SDOUT/SPDIF MUX(1)
SDOUT/SPDIF MUX
MUX1
MUX2
SDOUT2
0
0
SPDIF Tx
0
1
SPDIF In
1
(1)
Default values are shown in italics.
Table 50. DC Dither (0x1d)
BIT
31
30
29
28
27
26
25
24
DESCRIPTION
0
0
0
0
0
0
0
0
Unused
BIT
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
Unused
BIT
15
14
13
12
11
10
9
8
0
0
0
0
0
0
0
0
Unused
BIT
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
Unused
ON
DC dither enable
Table 51.
DC Dither Enable(1)
DC DITHER ENABLE
ON
Disable
0
Enable
1
(1)
Default values are shown in italics.
The DSP instruction execution loops each Fs cycle. At the beginning of the Fs cycle, the DSP instruction pointer
is set to the starting address specified in the 12 LSBs. The maximum address is the end address of DSP
instruction address 3327.
Table 52. DSP Program Start Address (0x1e)
BIT
31
30
29
28
27
26
25
24
DESCRIPTION
0
0
0
0
0
0
0
0
Unused
BIT
23
22
21
20
19
18
17
16
72
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TAS3218



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