7477 datasheet(59/361 Pages) RENESAS

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HARDWARE

1.11 Interrupts

7470/7471/7477/7478 GROUP USER’S MANUAL

1-52

1.11.2 Operation description

(1) Interrupt operation

After an interrupt is accepted, the contents of the register shown below are automatically pushed to

the stack area in sequence in the order of 1, 2 and 3 .

1 Program counter high-order (PCH)

2 Program counter low-order (PCL)

3 Processor status register (PS)

After the above register is pushed, a branch is made to the vector address of the accepted interrupt.

When the RTI instruction is executed at the end of the interrupt processing routine, the contents of

the above register which were pushed onto the stack area are popped to the respective registers in

sequence in the order of 3, 2 and 1, and the processing precedent to the acceptance of the

interrupt is restarted.

Figure 1.11.2 shows the interrupt operation.

Fig. 1.11.2 Interrupt operation

Interrupt occurs

(Accepting interrupt request)

·······

Executing routine

RTI instruction

Interrupt

processing

routine

Suspended

operation

Resume processing

: Operation commanded by software

: Internal operation to be performed automatically

Contents of Program counter (high-order) are pushed onto stack

Contents of Program counter (low-order) are pushed onto stack

Contents of Processor status register are pushed onto stack

Contents of Processor status register are popped from stack

Contents of Program counter (low-order) are popped from stack

Contents of Program counter (high-order) are popped from stack

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