7733 datasheet(200/940 Pages) RENESAS

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TIMER B

7733 Group User’s Manual

7–37

7.6 Clock timer

7.6.1 Setting for clock timer

Figure 7.6.3 shows an initial setting example for registers related to the clock timer.

Note that when using interrupts, setting for enabling interrupts is required. For details, refer to chapter “4.

INTERRUPTS.”

Fig. 7.6.3 Initial setting example for registers related to clock timer

Counting is started.

Selection of the clock timer

Oscillation circuit control register 0

(address 6C16)

Setting of the count start flag to “1”

Count start flag (address 4016)

Timer B2 count start flag

Setting of the interrupt priority level

Timer B2 interrupt control register (address 7C16)

Interrupt priority level selection bits

When using interrupts, one of levels 1 to 7 must be set.

When disabling interrupts, level 0 must be set.

Initialization of the clock prescaler

By using LDM instruction, write value “8016” to address 6F16.

1: XCIN–XCOUT selected

(Sub clock used)

Note: After oscillation of an oscillator connected to the sub-clock oscillation circuit is stabilized, set the count start flag to “1.”

Port-Xc selection bit

Timer B2 mode register (address 5D16)

g Counter divides the count source frequency by (n + 1).

b0 b7

Setting of the division ratio

Values 000016 to FFFF16 (n) can be set.

(b15)

(b8)

Timer B2 register

(addresses 5516 and 5416)

X: It may be “0” or “1.”

Selection of the clock timer

Oscillation circuit control register 0

(address 6C16)

Port-Xc selection bit

0: Ports P77 and P76 selected

(Sub clock not used)

Timer B2 mode register (address 5D16)

X: It may be “0” or “1.”

When using sub clock (Xc)

Port function control register

(address 6D16)

Sub-clock output selection bit/Timer B2 clock source selection bit

Timer B2 (Event counter mode) clock source selection

1: Main clock divided by 32

When not using sub clock (Xc)

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