 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
7733 датащи(PDF) 482 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
7733 датащи(HTML) 482 Page - Renesas Technology Corp |
|
|
482 / 940 page  LOW VOLTAGE VERSION 7733 Group User’s Manual 18–16 18.4 Electrical characteristics 18.4.6 Ready and Hold Timing requirements (Vcc = 2.7 to 5.5 V, Vss = 0 V, Ta = –40 to 85 °C, f(XIN) = 12 MHz (Note), unless otherwise noted) g The rise/fall time of an input signal must be 100 ns or less, unless otherwise noted. Limits tsu(RDY–φ1) tsu(HOLD–φ1) th(φ1–RDY) th(φ1–HOLD) Max. ns ns ns ns Min. Parameter Symbol Unit 80 80 0 0 Note: This is applied to the case where the main clock division selection bit = “0” and f(f2) = 6 MHz. Switching characteristics (Vcc = 2.7 to 5.5 V, Vss = 0 V, Ta = –40 to 85 °C, f(XIN) = 12 MHz, unless otherwise noted) ns Min. Max. 120 Limits Unit Conditions Parameter Fig. 18.4.1 Symbol _____ HLDA output delay time td(φ1–HLDA) ____ RDY input setup time _____ HOLD input setup time ____ RDY input hold time _____ HOLD input hold time |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
