3886 datasheet(64/380 Pages) RENESAS

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3886 Group User’s Manual

HARDWARE

BUS INTERFACE

The 3886 group has a 2-byte bus interface function which is al-

most functionally equal to MELPS8-41 series and the control

signal from the host CPU side can operate it (slave mode).

It is possible to connect the 3886 group with the RD and WR

separated CPU bus directly. Figure 36 shows the block diagram of

the bus interface function.

The data bus buffer function I/O pins (P42, P43, P46, P47, P50–

P53, P8) also function as the normal digital port I/O pins. When bit

0 (data bus buffer enable bit) of the data bus buffer control regis-

ter (address 002A16) is “0,” these pins become the normal digital

port I/O pins. When it is “1,” these bits become the data bus buffer

function I/O pins.

The selection of either the single data bus buffer mode, which

uses 1 byte: data bus buffer 0 only, or the double data bus buffer

mode, which uses 2 bytes: data bus buffer 0 and data bus buffer

1, is performed by bit 1 (data bus buffer function selection bit) of

the data bus buffer control register (address 002A16). Port P47 be-

comes S1 input in the double data bus buffer mode. When data is

written from the host CPU side, an input buffer full interrupt oc-

curs. When data is read from the host CPU, an output buffer

empty interrupt occurs. This microcomputer shares two input

buffer full interrupt requests and two output buffer empty interrupt

requests as shown in Figure 34, respectively.

Fig. 34 Interrupt request circuit of data bus buffer

FUNCTIONAL DESCRIPTION

Input buffer

full flag 0

IBF0

Input buffer

full flag 1

IBF1

Rising edge

detection circuit

One-shot pulse

generating circuit

One-shot pulse

generating circuit

Input buffer full interrupt

request signal IBF

Output buffer

full flag 0

OBF0

Output buffer

full flag 1

OBF1

One-shot pulse

generating circuit

One-shot pulse

generating circuit

Output buffer empty interrupt

request signal OBE

Interrupt request is set at this rising edge

IBF0

IBF1

IBF

OBF0

(

OBE0)

OBF1

(

OBE1)

OBE

OBE0

OBE1

Rising edge

detection circuit

Rising edge

detection circuit

Rising edge

detection circuit

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