4502 datasheet(39/214 Pages) RENESAS

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FUNCTION BLOCK OPERATIONS

1-27

4502 Group

HARDWARE

Rev.2.01

Feb 02, 2005

REJ09B0193-0201

Table 10 Timer control registers

W21

Stop (state initialized)

Operating

Instruction clock divided by 4

Instruction clock divided by 16

Stop (state retained)

Operating

Count start synchronous circuit not selected

Count start synchronous circuit selected

Prescaler control bit

Prescaler dividing ratio selection bit

Timer 1 control bit

Timer 1 count start synchronous circuit

control bit

Stop (state retained)

Operating

Count auto-stop circuit not selected

Count auto-stop circuit selected

Count source

Timer 1 underflow signal

Prescaler output (ORCLK)

CNTR input

System clock

Timer 2 control bit

Timer 1 count auto-stop circuit selection

bit (Note 2)

Timer 2 count source selection bits

W20

W13

W12

W11

W10

W23

W22

W21

W20

Timer control register W1

R/W

at RAM back-up : 00002

at reset : 00002

R/W

at RAM back-up : 00002

at reset : 00002

Timer control register W2

R/W

at RAM back-up : state retained

at reset : 00002

This bit has no function, but read/write is enabled.

Timer 1 underflow signal divided by 2 output

Timer 2 underflow signal divided by 2 output

P12(I/O)/CNTR input (Note 3)

P12 (input)/CNTR input/output (Note 3)

Not used

CNTR output selection bit

P12/CNTR function selection bit

Timer control register W6

R/W

at RAM back-up : state retained

at reset : 00002

Notes 1: “R” represents read enabled, and “W” represents write enabled.

2: This function is valid only when the timer 1 count start synchronization circuit is selected.

3: CNTR input is valid only when CNTR input is selected as the timer 2 count source.

(1) Timer control registers

• Timer control register W1

of count start synchronous circuit, and the frequency dividing ra-

tio and count operation of prescaler. Set the contents of this

instruction can be used to transfer the contents of register W1 to

• Timer control register W2

cuit, and the count operation and count source of timer 2. Set the

contents of this register through register A with the TW2A instruc-

tion. The TAW2 instruction can be used to transfer the contents

of register W2 to register A.

• Timer control register W6

tion of CNTR output. Set the contents of this register through

be used to transfer the contents of register W6 to register A..

(2) Prescaler

Prescaler is a frequency divider. Its frequency dividing ratio can be

selected. The count source of prescaler is the instruction clock.

Use the bit 2 of register W1 to select the prescaler dividing ratio

and the bit 3 to start and stop its operation. Prescaler is initialized,

and the output signal (ORCLK) stops when the bit 3 of register W1

is cleared to “0.”

W63

W62

W61

W60

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