поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

R8C/15 датащи(PDF) 91 Page - Renesas Technology Corp

номер детали R8C/15
подробное описание детали  16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / R8C/Tiny SERIES
PDF  277 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R8C/15 датащи(HTML) 91 Page - Renesas Technology Corp

Back Button R8C/15 Datasheet HTML 87Page - Renesas Technology Corp R8C/15 Datasheet HTML 88Page - Renesas Technology Corp R8C/15 Datasheet HTML 89Page - Renesas Technology Corp R8C/15 Datasheet HTML 90Page - Renesas Technology Corp R8C/15 Datasheet HTML 91Page - Renesas Technology Corp R8C/15 Datasheet HTML 92Page - Renesas Technology Corp R8C/15 Datasheet HTML 93Page - Renesas Technology Corp R8C/15 Datasheet HTML 94Page - Renesas Technology Corp R8C/15 Datasheet HTML 95Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 91 / 277 page
background image
R8C/14 Group, R8C/15 Group
12. Watchdog Timer
Rev.2.10
Jan 19, 2006
Page 79 of 253
REJ09B0164-0210
Figure 12.2
OFS and WDC Registers
Watchdog Timer Control Register
Symbol
Address
After Reset
WDC
000Fh
00011111b
Bit Symbol
Bit Name
Function
RW
WDC7
—
(b6)
Reserved Bit
Set to “0”
Prescaler Select Bit
0 : Divide-by-16
1 : Divide-by-128
RW
Reserved Bit
Set to “0”
RO
b7 b6 b5 b4
00
RW
High-order Bit of Watchdog Timer
—
(b4-b0)
RW
—
(b5)
b3 b2 b1 b0
Option Function Select Register
(1)
Symbol
Address
Before Shipment
OFS
0FFFFh
FFh(2)
Bit Symbol
Bit Name
Function
RW
NOTES :
1.
2.
CSPROINI
Count Source Protection
Mode After Reset Select
Bit
0 : Count source protect mode enabled after reset
1 : Count source protect mode disabled after reset
RW
—
(b6-b4)
Reserved Bit
Set to “1”
RW
0 : ROM code protect disabled
1 : ROMCP1 enabled
RW
ROMCP1
ROM Code Protect Bit
0 : ROM code protect enabled
1 : ROM code protect disabled
RW
0 : Watchdog timer starts automatically after reset
1 : Watchdog timer is inactive after reset
1
The OFS register is on the flash memory. Write to the OFS register w ith a program.
—
(b1)
RW
Reserved Bit
Set to “1”
ROMCR
ROM Code Protect
Disabled Bit
111
b7 b6 b5 b4
If the block including the OFS register is erased, “FFh” is set to the OFS register.
b3 b2 b1 b0
WDTON
RW
Watchdog Timer Start
Select Bit



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com