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HD6433044F датащи(PDF) 73 Page - Renesas Technology Corp

номер детали HD6433044F
подробное описание детали  Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
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производитель  RENESAS [Renesas Technology Corp]
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HD6433044F датащи(HTML) 73 Page - Renesas Technology Corp

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Section 2 CPU
Rev. 7.00 Sep 21, 2005 page 49 of 878
REJ09B0259-0700
P45 to P40 are set as output pins, and are in the low-level output state.
In this example, the BCLR instruction is used to make P40 an input port.
Before Execution of BCLR Instruction
P47
P46
P45
P44
P43
P42
P41
P40
Input/output
Input
Input
Output
Output
Output
Output
Output
Output
DDR
00
111
111
DR
10
000
000
Execution of BCLR Instruction
BCLR
#0, @P4DDR
;
Execute BCLR instruction on DDR
After Execution of BCLR Instruction
P47
P46
P45
P44
P43
P42
P41
P40
Input/output
Output
Output
Output
Output
Output
Output
Output
Input
DDR
1
1
111
11
0
DR
10
000
000
Explanation of BCLR Instruction
To execute the BCLR instruction, the CPU begins by reading P4DDR. Since P4DDR is a write-
only register, it is read as H'FF, even though its true value is H'3F.
Next the CPU clears bit 0 of the read data, changing the value to H'FE.
Finally, the CPU writes this value (H'FE) back to DDR to complete the BCLR instruction.
As a result, P40DDR is cleared to 0, making P40 an input pin. In addition, P47DDR and P46DDR
are set to 1, making P47 and P46 output pins.
The BCLR instruction can be used to clear flags in the internal I/O registers to 0. In an interrupt-
handling routine, for example, if it is known that the flag is set to 1, it is not necessary to read the
flag ahead of time.



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