R8C2K datasheet(240/471 Pages) RENESAS

240 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 223 of 450

REJ09B0406-0110

Figure 16.66

Buffer Operation in Output Compare Function

Perform the following for the timer mode (input capture and output compare functions).

When using the TRDGRCi (i = 0 or 1) register as the buffer register of the TRDGRAi register

• Set the IOC3 bit in the TRDIORCi register to 1 (general register or buffer register).

• Set the IOC2 bit in the TRDIORCi register to the same value as the IOA2 bit in the TRDIORAi register.

When using the TRDGRDi register as the buffer register of the TRDGRBi register

• Set the IOD3 bit in the TRDIORDi register to 1 (general register or buffer register).

• Set the IOD2 bit in the TRDIORCi register to the same value as the IOB2 bit in the TRDIORAi register.

Bits IMFC and IMFD in the TRDSRi register are set to 1 at the input edge of the TRDIOCi pin when also using

registers TRDGRCi and TRDGRDi as the buffer register in the input capture function.

When also using registers TRDGRCi and TRDGRDi as buffer registers for the output compare function, reset

synchronous PWM mode, complementary PWM mode, and PWM3 mode, bits IMFC and IMFD in the TRDSRi

TRDGRAi register

m-1

m+1

TRDi register

i = 0 or 1

The above applies under the following conditions:

• BFCi bit in the TRDMR register is set to 1 (the TRDGRCi register is used as the buffer register of

the TRDGRAi register).

• Bits IOA2 to IOA0 in the TRDIORAi register are set to 001b (“L” output by the compare match).

Transfer

TRDGRCi register

(buffer)

TRDIOAi output

TRDGRCi register

(buffer)

TRDGRAi

Comparator

TRDi

Compare match signal

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