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R8C2K датащи(PDF) 202 Page - Renesas Technology Corp |
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R8C2K датащи(HTML) 202 Page - Renesas Technology Corp |
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202 / 471 page ![]() R8C/2K Group, R8C/2L Group 16. Timers Rev.1.10 Dec 21, 2007 Page 185 of 450 REJ09B0406-0110 Figure 16.38 Registers TRCIOR0 and TRCIOR1 Timer RC I/O Control Register 0 (1) Symbol Address After Reset TRCIOR0 0124h 10001000b Bit Symbol Bit Name Function RW NOTES: 1. 2. 3. 4. The IOA3 bit is enabled w hen the IOA2 bit is set to 1 (input capture function). TRCGRB control bits Function varies according to the operating mode (function). When the BFD bit in the TRCMR register is set to 1 (buffer register of TRCGRB register), set the IOD2 bit in the TRCIOR1 register to the same value as the IOB2 bit in the TRCIOR0 register. — IOB0 IOB1 RW Nothing is assigned. If necessary, set to 0. When read, the content is 1. When the BFC bit in the TRCMR register is set to 1 (buffer register of TRCGRA register), set the IOC2 bit in the TRCIOR1 register to the same value as the IOA2 bit in the TRCIOR0 register. TRCGRB mode select bit(3) The TRCIOR0 register is enabled in timer mode. It is disabled in modes PWM and PWM2. — (b7) b3 b2 IOA3 b1 b0 IOA2 b7 b6 b5 b4 RW RW IOA1 IOA0 TRCGRA control bits Function varies according to the operating mode (function). IOB2 RW TRCGRA mode select bit(2) 0 : Output compare function 1 : Input capture function RW TRCGRA input capture input sw itch bit(4) 0 : fOCO128 signal 1 : TRCIOA pin input RW 0 : Output compare function 1 : Input capture function RW Timer RC I/O Control Register 1 (1) Symbol Address After Reset TRCIOR1 0125h 10001000b Bit Symbol Bit Name Function RW NOTES: 1. 2. 3. The TRCIOR1 register is enabled in timer mode. It is disabled in modes PWM and PWM2. Nothing is assigned. If necessary, set to 0. When read, the content is 1. TRCGRC mode select bit(2) 0 : Output compare function 1 : Input capture function RW — — (b7) IOD2 RW TRCGRD control bits RW RW IOC1 IOC0 TRCGRC control bits Function varies according to the operating mode (function). b7 b6 b5 b4 IOC2 0 : Output compare function 1 : Input capture function b3 b2 — (b3) b1 b0 RW Function varies according to the operating mode (function). When the BFD bit in the TRCMR register is set to 1 (buffer register of TRCGRB register), set the IOD2 bit in the TRCIOR1 register to the same value as the IOB2 bit in the TRCIOR0 register. — IOD0 IOD1 RW Nothing is assigned. If necessary, set to 0. When read, the content is 1. When the BFC bit in the TRCMR register is set to 1 (buffer register of TRCGRA register), set the IOC2 bit in the TRCIOR1 register to the same value as the IOA2 bit in the TRCIOR0 register. TRCGRD mode select bit(3) |
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