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R8C2K датащи(PDF) 204 Page - Renesas Technology Corp |
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R8C2K датащи(HTML) 204 Page - Renesas Technology Corp |
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204 / 471 page ![]() R8C/2K Group, R8C/2L Group 16. Timers Rev.1.10 Dec 21, 2007 Page 187 of 450 REJ09B0406-0110 16.3.3.2 Buffer Operation Bits BFC and BFD in the TRCMR register are used to select the TRCGRC or TRCGRD register as the buffer register for the TRCGRA or TRCGRB register. • Buffer register for TRCGRA register: TRCGRC register • Buffer register for TRCGRB register: TRCGRD register Buffer operation differs depending on the mode. Table 16.15 lists the Buffer Operation in Each Mode, Figure 16.40 shows the Buffer Operation for Input Capture Function, and Figure 16.41 shows the Buffer Operation for Output Compare Function. Figure 16.40 Buffer Operation for Input Capture Function Table 16.15 Buffer Operation in Each Mode Function, Mode Transfer Timing Transfer Destination Register Input capture function Input capture signal input Contents of TRCGRA (TRCGRB) register are transferred to buffer register Output compare function Compare match between TRC register and TRCGRA (TRCGRB) register Contents of buffer register are transferred to TRCGRA (TRCGRB) register PWM mode PWM2 mode • Compare match between TRC register and TRCGRA register • TRCTRG pin trigger input Contents of buffer register (TRCGRD) are transferred to TRCGRB register m Transfer n n-1 n+1 TRCIOA input TRC register The above applies under the following conditions: • The BFC bit in the TRCMR register is set to 1 (the TRCGRC register functions as the buffer register for the TRCGRA register). • Bits IOA2 to IOA0 in the TRCIOR0 register are set to 100b (input capture at the rising edge). m Transfer n TRCGRC register TRCGRA register TRC TRCIOA input (input capture signal) TRCGRA register TRCGRC register (buffer) |
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