 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
R8C2K датащи(PDF) 199 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
R8C2K датащи(HTML) 199 Page - Renesas Technology Corp |
|
|
199 / 471 page  R8C/2K Group, R8C/2L Group 16. Timers Rev.1.10 Dec 21, 2007 Page 182 of 450 REJ09B0406-0110 Figure 16.35 TRCCR2 Register Timer RC Control Register 2 Symbol Address After Reset TRCCR2 0130h 00011111b Bit Symbol Bit Name Function RW NOTES: 1. 2. 3. RW RW TRCTRG input edge select bits(3) b7 b6 0 0 : Disable the trigger input from the TRCTRG pin 0 1 : Rising edge selected 1 0 : Falling edge selected 1 1 : Both edges selected b7 b6 b5 b4 b3 b2 TCEG0 b1 b0 CSEL In timer mode and PWM mode these bits are disabled. In timer mode and PWM mode this bit is disabled (the count operation continues independent of the CSEL bit setting). TCEG1 For notes on PWM2 mode, refer to 16.3.9.5 TRCMR Register in PWM2 Mode. — (b4-b0) Nothing is assigned. If necessary, set to 0. When read, the content is 1. — TRC count operation select bit(1, 2) 0 : Count continues at compare match w ith the TRCGRA register 1 : Count stops at compare match w ith the TRCGRA register RW |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
