R8C2K datasheet(135/471 Pages) RENESAS

135 / 471 page

R8C/2K Group, R8C/2L Group

12. Interrupts

Rev.1.10

Dec 21, 2007

Page 118 of 450

REJ09B0406-0110

12.5

Timer RC Interrupt, Timer RD Interrupt (Interrupts with Multiple Interrupt

Request Sources)

The timer RC interrupt, timer RD (channel 0) interrupt, and timer RD (channel 1) interrupt each have multiple

interrupt request sources. An interrupt request is generated by the logical OR of several interrupt request factors

and is reflected in the IR bit in the corresponding interrupt control register. Therefore, each of these peripheral

functions has its own interrupt request source status register (status register) and interrupt request source enable

12.21 shows a Block Diagram of Timer RD Interrupt.

Figure 12.21

Block Diagram of Timer RD Interrupt

Table 12.8

Registers Associated with Timer RC Interrupt and Timer RD Interrupt

Peripheral Function

Name

Status Register of

Interrupt Request Source

Enable Register of

Interrupt Request Source

Interrupt Control

Timer RC

TRCSR

TRCIER

TRCIC

Timer RD

Channel 0

TRDSR0

TRDIER0

TRD0IC

Channel 1

TRDSR1

TRDIER1

TRD1IC

Timer RD (channel i)

interrupt request

(IR bit in TRDiIC register)

IMFA bit

IMIEA bit

IMFB bit

IMIEB bit

IMFC bit

IMIEC bit

IMFD bit

IMIED bit

UDF bit

OVF bit

OVIE bit

i = 0 or 1

IMFA, IMFB, IMFC, IMFD, OVF, UDF: Bits in TRDSRi register

IMIEA, IMIEB, IMIEC, IMIED, OVIE: Bits in TRDIER register

Channel i

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