R8C2K datasheet(130/471 Pages) RENESAS

130 / 471 page

R8C/2K Group, R8C/2L Group

12. Interrupts

Rev.1.10

Dec 21, 2007

Page 113 of 450

REJ09B0406-0110

12.2.2

INTi Input Filter (i = 0, 1, 3)

The INTi input contains a digital filter. The sampling clock is selected by bits INTiF1 to INTiF0 in the INTF

The INTi level is sampled every sampling clock cycle and if the sampled input level matches three times, the IR

bit in the INTiIC register is set to 1 (interrupt requested).

Figure 12.16 shows the Configuration of INTi Input Filter. Figure 12.17 shows an Operating Example of INTi

Input Filter.

Figure 12.16

Configuration of INTi Input Filter

Figure 12.17

Operating Example of INTi Input Filter

INTiF0, INTiF1: Bits in INTF register

INTiEN, INTiPL: Bits in INTEN register

i = 0, 1, 3

= 01b

INTi

Port direction

Sampling clock

Digital filter

(input level

matches 3x)

INTi interrupt

= 10b

= 11b

f32

INTiF1 to INTiF0

INTiEN

Other than

INTiF1 to INTiF0

= 00b

INTiPL = 0

INTiPL = 1

NOTE:

1. INT0: Port P4_5 direction register

INT1: Port P1_5 direction register when using the P1_5 pin

Port P1_7 direction register when using the P1_7 pin

INT3: Port P3_3 direction register

Both edges

detection

circuit

INTi input

Sampling

timing

IR bit in

INTiIC register

Set to 0 by a program

This is an operation example when bits INTiF1 to INTiF0 in the

INTiF register are set to 01b, 10b, or 11b (digital filter enabled).

i = 0, 1, 3

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