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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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R8C2K датащи(PDF) 128 Page - Renesas Technology Corp |
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R8C2K датащи(HTML) 128 Page - Renesas Technology Corp |
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128 / 471 page  R8C/2K Group, R8C/2L Group 12. Interrupts Rev.1.10 Dec 21, 2007 Page 111 of 450 REJ09B0406-0110 12.2 INT Interrupt 12.2.1 INTi Interrupt (i = 0, 1, 3) The INTi interrupt is generated by an INTi input. When using the INTi interrupt, the INTiEN bit in the INTEN register is set to 1 (enable). The edge polarity is selected using the INTiPL bit in the INTEN register and the POL bit in the INTiIC register. Inputs can be passed through a digital filter with three different sampling clocks. The INT0 pin is shared with the pulse output forced cutoff of timer RC and timer RD, and the external trigger input of timer RB. Figure 12.12 shows the PMR Register, Figure 12.13 shows the INTEN Register, Figure 12.14 shows the INTF Register, and Figure 12.15 shows the TRAIOC Register. Figure 12.12 PMR Register Figure 12.13 INTEN Register Port Mode Register Symbol Address After Reset PMR 00F8h 00h RW WO Function Set to “04h” w hen using INT3 _____ . Do not set values other than “04h”. When read, its content is undefined. b0 b7 External Input Enable Register Symbol Address After Reset INTEN 00F9h 00h Bit Symbol Bit Name Function RW INT0 _____ input enable bit INT0 _____ input polarity select bit(1,2) INT1 _____ input enable bit INT1 _____ input polarity select bit(1,2) INT3 _____ input enable bit INT3 _____ input polarity select bit(1,2) NOTES: 1. 2. 0 : Disable 1 : Enable RW — (b5-b4) Set to 0. RW Reserved bit When setting the INTiPL bit (i = 0, 1, 3) to 1 (both edges), set the POL bit in the INTiIC register to 0 (selects falling edge). The IR bit in the INTiIC register may be set to 1 (requests interrupt) w hen the INTiPL bit is rew ritten. Refer to 12.6.4 Changing Interrupt Sources. 0 : Disable 1 : Enable 0 : One edge 1 : Both edges 0 : One edge 1 : Both edges RW INT0PL RW INT1EN 0 : Disable 1 : Enable RW INT0EN RW INT1PL 0 : One edge 1 : Both edges RW INT3EN 00 INT3PL b3 b2 b1 b0 b7 b6 b5 b4 |
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