M37274EFSP datasheet(49/148 Pages) RENESAS

49 / 148 page

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER

and ON-SCREEN DISPLAY CONTROLLER

M37274EFSP

PRELIMINARY

Notice:

This

is not

a final

specification.

Some

paramentic

limits

are

subject

to change.

MITSUBISHI MICROCOMPUTERS

For the main data slice line, the count value of pulses in the window

is stored in clock run-in register 1 (address 00E616; refer to Figure

44). For the sub-data slice line, the count value of pulses in the window

is stored in clock run-in register (address 020916; refer to Figure 45).

When this count value is 4 to 6, it is determined as a clock run-in.

Accordingly, set the count value so that the window may start after

the first pulse of the clock run-in (refer to Figure 46).

The contents to be set in the window register are written at a falling

of the horizontal synchronous signal. For this reason, even if an

instruction for setting is executed, the contents of the register cannot

be rewritten until a falling of the horizontal synchronous signal.

For the main data slice line, reference clock is counted in the period

from a falling of the clock pulse set in bits 0 to 2 of clock run-in detect

stored in bits 3 to 7 of clock run-in detect register 1 (address 00E816)

(When the count value exceeds “1F16,” “1F16” is held). For the sub-

data slice line, the count value is stored in bits 3 to 7 of clock run-in

detect register 3 (address 020816). Read out these bits after the

occurence of a data slicer interrupt (refer to (11) Interrupt Request

Generating Circuit).

Figure 48 shows the structure of clock run-in detect registers 1 and

Fig. 44. Clock Run-in Register 1

b7 b6 b5 b4 b3 b2 b1 b0

Clock run-in register 1 (CR1) [Address 00E6 16]

Clock Run-in Register 1

0R W

Clock run-in count value

of main-data slice line

(CR10 to CR13)

0R W

4, 6

Fix these bits to “1.”

After reset

Functions

Name

0R W

5, 7

Fix these bits to “0.”

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