4518 datasheet(39/160 Pages) RENESAS

39 / 160 page

Rev.3.01

2005.06.15

page 39 of 157

REJ03B0008-0301

4518 Group

(11) Timer input/output pin

(D6/CNTR0 pin, D7/CNTR1 pin)

CNTR0 pin is used to input the timer 1 count source and output the

timer 1 and timer 2 underflow signal divided by 2.

CNTR1 pin is used to input the timer 3 count source and output the

PWM signal generated by timer 4.

The D6/CNTR0 pin function can be selected by bit 0 of register W6.

The selection of D7/CNTR1 output signal can be controlled by bit 3

of register W4.

When the CNTR0 input is selected for timer 1 count source, timer

1 counts the rising or falling waveform of CNTR0 input. The count

edge is selected by the bit 2 of register W6.

When the CNTR1 input is selected for timer 3 count source, timer

3 counts the rising or falling waveform of CNTR1 input. The count

edge is selected by the bit 3 of register W6.

(12) PWM output function (D7/CNTR1, timer 3,

timer 4)

When bit 3 of register W4 is set to “1”, timer 4 reloads data from re-

load register R4L and R4H alternately each underflow.

Timer 4 generates the PWM signal (PWMOUT) of the “L” interval

set as reload register R4L, and the “H” interval set as reload regis-

ter R4H. The PWM signal (PWMOUT) is output from CNTR1 pin.

When bit 2 of register W4 is set to “1” at this time, the interval

(PWM signal “H” interval) set to reload register R4H for the counter

of timer 4 is extended for a half period of count source.

In this case, when a value set in reload register R4H is n, timer 4

divides the count source signal by n + 1.5 (n = 1 to 255).

When this function is used, set “1” or more to reload register R4H.

When bit 1 of register W6 is set to “1”, the PWM signal output to

CNTR1 pin is switched to valid/invalid each timer 3 underflow.

However, when timer 3 is stopped (bit 2 of register W3 is cleared to

“0”), this function is canceled.

Even when bit 1 of a register W4 is cleared to “0” in the “H” interval

of PWM signal, timer 4 does not stop until it next timer 4 underflow.

When clearing bit 1 of register W4 to “0” to stop timer 4 at the use

of PWM output function, avoid a timing when timer 4 underflows.

(9) Count start synchronization circuit (timer 1,

timer 3)

Timer 1 and timer 3 have the count start synchronous circuit which

synchronizes the input of INT0 pin and INT1 pin, and can start the

timer count operation.

Timer 1 count start synchronous circuit function is selected by set-

ting the bit 0 of register I1 to “1” and the control by INT0 pin input

can be performed.

Timer 3 count start synchronous circuit function is selected by set-

ting the bit 0 of register I2 to “1” and the control by INT1 pin input

can be performed.

When timer 1 or timer 3 count start synchronous circuit is used, the

count start synchronous circuit is set, the count source is input to

each timer by inputting valid waveform to INT0 pin or INT1 pin.

The valid waveform of INT0 pin or INT1 pin to set the count start

synchronous circuit is the same as the external interrupt activated

condition.

Once set, the count start synchronous circuit is cleared by clearing

the bit I10 or I20 to “0” or reset.

However, when the count auto-stop circuit is selected, the count

start synchronous circuit is cleared (auto-stop) at the timer 1 or

timer 3 underflow.

(10) Count auto-stop circuit (timer 1, timer 3)

Timer 1 has the count auto-stop circuit which is used to stop timer

1 automatically by the timer 1 underflow when the count start syn-

chronous circuit is used.

The count auto-stop cicuit is valid by setting the bit 3 of register W1

to “1”. It is cleared by the timer 1 underflow and the count source to

timer 1 is stopped.

This function is valid only when the timer 1 count start synchronous

circuit is selected.

Timer 3 has the count auto-stop circuit which is used to stop timer

3 automatically by the timer 3 underflow when the count start syn-

chronous circuit is used.

The count auto-stop cicuit is valid by setting the bit 3 of register W3

to “1”. It is cleared by the timer 3 underflow and the count source to

timer 3 is stopped.

This function is valid only when the timer 3 count start synchronous

circuit is selected.

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