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HD151TS201AT датащи(PDF) 15 Page - Renesas Technology Corp |
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HD151TS201AT датащи(HTML) 15 Page - Renesas Technology Corp |
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15 / 29 page ![]() HD151TS201AT Rev.1.00, Oct.21.2003, page 15 of 28 I 2C Controlled Register Bit Map (cont.) Byte17 3V66 Skew Control Register Bit Description Contents Default 7 (Reserved) 0 6 (Reserved) 0 5 3V66 clock skew controlbit5 0 4 3V66 clock skew controlbit4 00 : Delay 0ps 11 : Ahead 500ps 01 : Delay 250ps 11 : Ahead 250ps 0 3 3V66 clock skew controlbit3 0 2 3V66 clock skew controlbit2 0 1 3V66 clock skew controlbit1 1 0 3V66 clock skew controlbit0 0100 : Delay 0ps 0101 : Delay 500ps 0011 : Ahead 500ps 0110 : Delay 1000ps 0010 : Ahead 1000ps 0111 : Delay 1500ps 0001 : Ahead 1500ps 1000 : Delay 2000ps 0000 : Ahead 2000ps Don’t set 1001 to 1111 0 Byte18 PCI Skew Control Register 1 Bit Description Contents Default 7 (Reserved) 0 6 (Reserved) 0 5 PCI clock skew controlbit5 0 4 PCI clock skew controlbit4 00 : Delay 0ps 10 : Ahead 500ps 01 : Delay 250ps 11 : Ahead 250ps 0 3 PCI clock skew controlbit3 0 2 PCI clock skew controlbit2 1 1 PCI clock skew controlbit1 1 0 PCI clock skew controlbit0 0100 : Delay 0ps 0101 : Delay 500ps 0011 : Ahead 500ps 0110 : Delay 1000ps 0010 : Ahead 1000ps 0111 : Delay 1500ps 0001 : Ahead 1500ps 1000 : Delay 2000ps 0000 : Ahead 2000ps Don’t set 1001 to 1111 0 Byte19 PCI Skew Control Register 2 Bit Description Contents Default 7 (Reserved) 0 6 PCI_F2 skew Early or Late 0 5 PCI_F1 skew Early or Late 0 4 PCI_F0 skew Early or Late “0” = Early “1” = Late 0 3 PCI clock skew controlbit3 0 2 PCI clock skew controlbit2 1 1 PCI clock skew controlbit1 0 0 PCI clock skew controlbit0 0100 : Delay 0ps 0101 : Delay 500ps 0011 : Ahead 500ps 0110 : Delay 1000ps 0010 : Ahead 1000ps 0111 : Delay 1500ps 0001 : Ahead 1500ps 1000 : Delay 2000ps 0000 : Ahead 2000ps Don’t set 1001 to 1111 0 |
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