TDA7540N datasheet(37/76 Pages) STMICROELECTRONICS

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TDA7540N

Functional description

37/76

4.5

I2C-Bus interface

The TDA7540N supports the I2C-Bus protocol. This protocol defines any device that sends

data onto the bus as a transmitter, and the receiving device as the receiver. The device that

controls the transfer is a master and device being controlled is the slave. The master will

always initiate data transfer and provide the clock to transmit or receive operations.

Data transition

Data transition on the SDA line must only occur when the clock SCL is LOW. SDA transitions

while SCL is HIGH will be interpreted as START or STOP condition.

Start condition

A start condition is defined by a HIGH to LOW transition of the SDA line while SCL is at a

stable HIGH level. This "START" condition must precede any command and initiate a data

transfer onto the bus. The device continuously monitors the SDA and SCL lines for a valid

START and will not response to any command if this condition has not been met.

Stop condition

A STOP condition is defined by a LOW to HIGH transition of the SDA while the SCL line is at

a stable HIGH level. This condition terminates the communication between the devices and

forces the bus-interface of the device into the initial condition.

Acknowledge

Indicates a successful data transfer. The transmitter will release the bus after sending 8 bits

of data. During the 9th clock cycle the receiver will pull the SDA line to LOW level to indicate

it receive the eight bits of data.

Data transfer

During data transfer the device samples the SDA line on the leading edge of the SCL clock.

Therefore, for proper device operation the SDA line must be stable during the SCL LOW to

HIGH transition.

Device addressing

To start the communication between two devices, the bus master must initiate a start

instruction sequence, followed by an eight bit word corresponding to the address of the

device it is addressing.

The most significant 6 bits of the slave address are the device type identifier.

The TDA7540N device type is fixed as "110001".

The next significant bit is used to address a particular device of the previous defined type

connected to the bus.

The state of the hardwired PIN 59 defines the state of this address bit. So up to two devices

could be connected on the same bus. When PIN 59 is connected to VCC2 and a resistor at

PIN 55 versus ground of about 5.6k Ohm the address bit “1” is selected. In this case the AM

part doesn’t work. Otherwise the address bit “0” is selected (FM and AM is working).

Therefor a double FM tuner concept is possible.

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