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STTS424E02BDA3F датащи(PDF) 31 Page - STMicroelectronics

номер детали STTS424E02BDA3F
подробное описание детали  Memory module temperature sensor with a 2 Kb SPD EEPROM
PDF  51 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STTS424E02BDA3F датащи(HTML) 31 Page - STMicroelectronics

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STTS424E02
SPD EEPROM operation
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5.4.1
SWP and CWP
If the software write-protection has been set with the SWP instruction, it can be cleared
again with a CWP instruction.
The two instructions (SWP and CWP) have the same format as a Byte Write instruction, but
with a different Device Type Identifier (as shown in Table 20). Like the Byte Write instruction,
it is followed by an address byte and a data byte, but in this case the contents are all “Don’t
Care” (Figure 11). Another difference is that the voltage, VHV, must be applied on the A0 pin,
and specific logical levels must be applied on the other two address pins A1 and A2 (as
shown in Table 20).
5.4.2
PSWP
If the software write-protection has been set with the PSWP instruction, the first 128 bytes of
the memory are permanently write-protected. This write-protection cannot be cleared by
any instruction, or by power-cycling the device, and regardless the state of Write Control
(WC). Also, once the PSWP instruction has been successfully executed, the SPD EEPROM
no longer acknowledges any instruction (with a Device Type Identifier of 0110) to access the
write-protection settings.
Figure 11.
Setting the write protection (WC = 0)
5.5
Write operations
Following a Start condition the bus master sends a Device Select Code with the RW bit
reset to 0. The device acknowledges this, as shown in Figure 12, and waits for an address
byte. The device responds to the address byte with an acknowledge bit, and then waits for
the data byte.
When the bus master generates a Stop condition immediately after the Ack bit (in the “10th
bit” time slot), either at the end of a Byte Write or a Page Write, the internal memory Write
cycle is triggered. A Stop condition at any other time slot does not trigger the internal Write
cycle.
During the internal Write cycle, Serial Data (SDA) and Serial Clock (SCL) are ignored, and
the device does not respond to any requests.
SDA LINE
AI01935B
ACK
WORD
ADDRESS
VALUE
(DON'T CARE)
ACK
DATA
VALUE
(DON'T CARE)
ACK
CONTROL
BYTE
BUS ACTIVITY
MASTER
BUS ACTIVITY



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