M41T93RMY6F datasheet(35/51 Pages) STMICROELECTRONICS

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M41T93

Clock operation

35/51

3.15

Initial power-on defaults

Upon initial application of power to the device, the register bits will initially power-on in the

state indicated in Table 13 and Table 14.

Table 13.

Initial power-on default values (part 1)

Table 14.

Initial power-up default values (part 2)

3.16

OTP bit operation (SOX18 package only)

When the OTP (one time programmable) bit is set to a '1,' the value in the internal OTP

registers will be transferred to the analog calibration register (12h) and are “read only.” The

OTP value is programmed by the manufacturer, and will contain the calibration value

necessary to achieve ±5 ppm at room temperature after two SMT reflows. This clock

accuracy can be guaranteed to drift no more than ±3 ppm the first year, and ±1 ppm for

each following year due to crystal aging.

If the OTP bit is set to '0,' the analog calibration register will become a WRITE/READ

desired value of analog calibration.

When the user sets the OTP bit, they need to wait for approximately 8 ms before the analog

registers transfer the value from the OTP to the analog registers due to the OTP read

operation.

Condition(1)

All other control bits power-up in an undetermined state

CB1 CB0 OUT FT

DCS

ACS

Digital

calib.

Analog

calib.

OFIE Watchdog(2)

BMB0-BMB4, RB0, RB1

A1IE

SQWE ABE

Initial

power-up

Subsequent

power-up(3)(4)

With battery backup

UC = Unchanged

Condition(1)

All other control bits power-up in an undetermined state

RPT11-15

TI/TP

TIE

TD1

TD0 RS0 RS1-3 OTP RPT21-25

AL2E

Initial

power-up

Subsequent

power-up (2)(3)

With battery backup

UC = Unchanged

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