XC2000 datasheet(71/647 Pages) INFINEON

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XC2000 Derivatives

System Units (Vol. 1 of 2)

Memory Organization

Preliminary

User’s Manual

3-9

V1.0, 2007-06

MemoryX2K, V1.1

3.3

Data Memory Areas

The XC2000 provides two on-chip RAM areas exclusively for data storage:

•The Dual Port RAM (DPRAM) can be used for global register banks (GPRs), system

stack, storage of variables and other data, in particular for MAC operands.

•The Data SRAM (DSRAM) can be used for system stack (recommended), storage

of variables and other data.

Note: Data can also be stored in the PSRAM (see Section 3.10). However, both data

memory areas provide the fastest access.

Two additional on-chip memory areas exist with the special purpose to retain data while

the system power domain is switched off:

•The Stand-By RAM (SBRAM).

•The Marker Memory (MKMEM).

Dual-Port RAM (DPRAM)

The XC2000 provides 2 Kbytes of DPRAM (00’F600H … 00’FDFFH). Any word or byte

data in the DPRAM can be accessed via indirect or long 16-bit addressing modes, if the

selected DPP register points to data page 3. Any word data access is made on an even

byte address. The highest possible word data storage location in the DPRAM is

00’FDFEH.

For PEC data transfers, the DPRAM can be accessed independent of the contents of the

DPP registers via the PEC source and destination pointers.

The upper 256 bytes of the DPRAM (00’FD00H through 00’FDFFH) are provided for

single bit storage, and thus they are bit addressable.

Note: Code cannot be executed out of the DPRAM.

An area of 3 Kbytes is dedicated to DPRAM (00’F200H … 00’FDFFH). The locations

without implemented DPRAM are reserved.

Data SRAM (DSRAM)

The XC2000 provides 16 Kbytes of DSRAM (00’A000H … 00’CFFFH). Any word or byte

data in the DSRAM can be accessed via indirect or long 16-bit addressing modes, if the

selected DPP register points to data page 3. Any word data access is made on an even

byte address. The highest possible word data storage location in the DSRAM is

00’CFFEH.

For PEC data transfers, the DSRAM can be accessed independent of the contents of the

DPP registers via the PEC source and destination pointers.

Note: Code cannot be executed out of the DSRAM.

An area of 20 Kbytes is dedicated to DSRAM (00’8000H … 00’CFFFH). The location

without implemented DSRAM are reserved.

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