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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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XC2000 датащи(PDF) 95 Page - Infineon Technologies AG |
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XC2000 датащи(HTML) 95 Page - Infineon Technologies AG |
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95 / 110 page  XC2287 / XC2286 / XC2285 XC2000 Family Derivatives Electrical Parameters Preliminary Data Sheet 93 V0.91, 2007-02 Draft Version 4.4.5 External Bus Timing The following parameters define the behavior of the XC228x’s bus interface. Figure 19 CLKOUT Signal Timing Note: The term CLKOUT refers to the reference clock output signal which is generated by selecting f SYS as source signal for the clock output signal EXTCLK on pin P2.8 and by enabling the high-speed clock driver on this pin. Table 20 CLKOUT Reference Signal Parameter Symbol Limits Unit Min. Max. CLKOUT cycle time tc 5 CC 40/25/15 1) 1) The CLKOUT cycle time is influenced by the PLL jitter (given values apply to f CPU = 25/40/66 MHz). For longer periods the relative deviation decreases (see PLL deviation formula). ns CLKOUT high time tc 6 CC 3 – ns CLKOUT low time tc 7 CC 3 – ns CLKOUT rise time tc 8 CC – 3 ns CLKOUT fall time tc 9 CC – 3 ns MCT05571 CLKOUT t C5 t C6 t C7 t C8 t C9 |
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