C167CS-4RM datasheet(45/517 Pages) INFINEON

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C167CS

Derivatives

Memory Organization

User’s Manual

3-8

V2.0, 2000-07

Special Function Registers

The functions of the CPU, the bus interface, the IO ports and the on-chip peripherals of

the C167CS are controlled via a number of so-called Special Function Registers (SFRs).

These SFRs are arranged within two areas of 512 Byte size each. The first register

block, the SFR area, is located in the 512 Bytes above the internal RAM (00’FFFFH …

00’FE00H), the second register block, the Extended SFR (ESFR) area, is located in the

512 Bytes below the internal RAM (00’F1FFH … 00’F000H).

Special function registers can be addressed via indirect and long 16-bit addressing

modes. Using an 8-bit offset together with an implicit base address allows to address

word SFRs and their respective low bytes. However, this does not work for the

respective high bytes!

Note: Writing to any byte of an SFR causes the non-addressed complementary byte to

be cleared!

The upper half of each register block is bit-addressable, so the respective control/status

bits can directly be modified or checked using bit addressing.

When accessing registers in the ESFR area using 8-bit addresses or direct bit

addressing, an Extend Register (EXTR) instruction is required before, to switch the short

addressing mechanism from the standard SFR area to the Extended SFR area. This is

not required for 16-bit and indirect addresses. The GPRs R15 … R0 are duplicated, i.e.

they are accessible within both register blocks via short 2-, 4- or 8-bit addresses without

switching.

ESFR_SWITCH_EXAMPLE:

EXTR

;Switch to ESFR area for next 4 instr.

MOV

ODP2, #data16

;ODP2 uses 8-bit reg addressing

BFLDL

DP6, #mask, #data8

;Bit addressing for bit fields

BSET

DP1H.7

;Bit addressing for single bits

MOV

T8REL, R1

;T8REL uses 16-bit mem address,

;R1 is duplicated into the ESFR space

;(EXTR is not required for this access)

;----

;-----------------

;The scope of the EXTR #4 instruction

…

;

… ends here!

MOV

T8REL, R1

;T8REL uses 16-bit mem address,

;R1 is accessed via the SFR space

In order to minimize the use of the EXTR instructions the ESFR area mostly holds

registers which are mainly required for initialization and mode selection. Registers that

need to be accessed frequently are allocated to the standard SFR area, wherever

possible.

Note: The tools are equipped to monitor accesses to the ESFR area and will

automatically insert EXTR instructions, or issue a warning in case of missing or

excessive EXTR instructions.

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