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DP80390 датащи(PDF) 31 Page - Digital Core Design

номер детали DP80390
подробное описание детали  Pipelined High Performance Microcontroller Instructions set details ver 3.10
PDF  84 Pages
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производитель  DCD [Digital Core Design]
домашняя страница  http://www.digitalcoredesign.com
Logo DCD - Digital Core Design

DP80390 датащи(HTML) 31 Page - Digital Core Design

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DP80390 Instructions set details
- 31 -
All trademarks mentioned in this document
http://www.DigitalCoreDesign.com
are trademarks of their respective owners.
http://www.dcd.pl
Copyright 1999-2003 DCD – Digital Core Design. All Rights Reserved.
3.8.
CPL
3.8.1. CPL A
Function:
Complement accumulator
Description: Each bit of the accumulator is logically complemented (one’s
complement). Bits which previously contained a one are changed to
zero and vice versa. No flags are affected.
Operation:
(PC)
← (PC) + 1
(A)
← / (A)
Bytes:
1
Cycles:
1
Encoding:
1
1
1
1
0
1
0
0
3.8.2. CPL BIT
Function:
Complement bit
Description: The bit variable specified is complemented. A bit which had been a one
is changed to zero and vice versa. No other flags are affected. CPL can
operate on the carry or any directly addressable bit.
Note:
When this instruction is used to modify an output pin, the value used as
the original data will be read from the output data latch, not the input
pin.
Operation:
(PC)
← (PC) + 2
(C)
← (bit)
Bytes:
2
Cycles:
3
Encoding:
1
0
1
1
0
0
1
0
bit address



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