ST75C520PQFP datasheet(39/45 Pages) STMICROELECTRONICS

39 / 45 page

SERIAL

OUT

RX BUFF ER

ST A T U S

RX DATA

BU FFER

RECE I V E R

ST AT US

RECE I V E R

DA T A

ER ROR R X

( SYSERR )

IT 3

RXD

RX C L K

DA TA

FO R M AT

RECEIVE

DEFRAMER

Figure 7 : Rx Buffer Schematics

IX.2 - Receive Operations Overview

Figure 7 describes the receive data flow.

The ST75C520 can handle the following types of

format for the data :

- parallel synchronous mode : 8-bit words are syn-

chronously available in the receive buffers. The

buffer status holds the number of valid bytes

received,

- parallel HDLC framing mode : 8-bit data is avail-

able in the receive buffers. Framing information

(like flags, CRC, additional ”0”) is interpreted by

the ST75C520 and reported when necessary in

the receive buffer status (CRC error, aborted

frame, framing error, etc). This feature greatly

eases the implementation of protocols as well as

FAX data management.

Each time the receive deframer has filled up a new

buffer, it sets the corresponding flag with the proper

status then generates the IT3 interrupt. The avail-

ability of the buffers is tested just before starting to

fill them. This further means that the host must not

perform any buffer operation on the data part while

the status remains 0.

IX.3 - Transmit Operations Overview

Figure 8 describes the transmit data flow. The

following modes are available :

- parallel synchronous mode : 8-bit words are syn-

chronously read from the transmit buffers. The

transmit status buffer holds the number of valid

bytes to be transmitted (up to 8 per buffer),

- parallel HDLC framing mode : 8-bit data is re-

ceived from the transmit buffers. Framing infor-

mation (frame open, frame close, frame abort,

number of byte per buffer) is carried by the trans-

m it buffe r s tat us a nd pr ocessed by th e

ST75C520. CRC, padding and other operations

are automatically handled by the ST75C520.

Each time the transmit framer has emptied a buffer,

the IT2 interrupt is raised.

TRAN SM I TTER

STATU S

TRAN SM I TTER

DATA

ERR OR TX

(SYSER R)

IT2

TX D

TX C LK

DATA

FO RM A T

TX BUFF ER

STA TUS

TX DATA

BUFFER

SERI AL

SERIAL

MU X

TRANSM ITTER

FRAMER

Figure 8 : Tx Buffer Schematics

ST75C520

39/45

ST75C520PQFP датащи(PDF) 39 Page - STMicroelectronics

ST75C520PQFP датащи(HTML) 39 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

датащи скачать

ссылки URL