ST75C520PQFP datasheet(27/45 Pages) STMICROELECTRONICS

27 / 45 page

VII - STATUS DESCRIPTION

This appendix is dedicated to the ST75C520 re-

porting features. in the following sections the com-

mand acknowledge process and the report and

status definitions are explained.

VII.1 - Command Acknowledge and Report

VII.1.1 - Command Acknowledge Process

(see Figure 1)

The ST75C520 features an acknowledge process

based on a counter COMACK. On power-on reset

(or INIT command), this counter’s value is set to 0.

Each time a command is successfully executed by

the ST75C520, the acknowledge counter CO-

MACK is incremented. This allows a precise moni-

toring of the command entered and avoids

command collision.

In the case of a memory reading command (CR,

TDRC, TDRW, IDT or MR) once the command

entered is executed, the report area is filled and the

acknowledge counter is incremented afterwards.

This insures that the controller will read the value

corresponding to its request.

Furthermore, the ST75C520 resets the value of the

COMSYS register once the command has been

read. The interruption IT6 is raised just after the

counter is incremented.

VII.1.2 - Reports Specification

The report section of the Dual Port RAM is dedi-

cated to memory reading. In response to a CR, MR,

TDRC, TDRW, IDT commands, the value read is

transferred to the report registers COMREP[0..1].

ASSERT

INTER RUPT

IT0

SET SYSERR

ERR _IOCD

SET SY SERR

ERR_IPRM

EXECUTE

COMMAND

CLEAR

ANSWER

END

Yes

BEGIN

COMSYS = 0

COMMAND EXIST

Yes

CLEAR

COMSYS

ASSERT

INTERRUPT

IT6

COPY ANSWER

INTO

COMREP

ASS ERT

INTE RRUP T

IT0

INC REMENT

COMACK

Figure 1 : Command Acknowledge Process

ST75C520

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